component
TPS76201DBVR
Public Made by Adomby adom
Texas Instruments Linear Voltage Regulators (LDO), SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS76201DBVR
Texas Instruments · Linear Voltage Regulators (LDO) · SOT-23-5
TPS76201DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input supply voltage, 2.7 V to 10 V recommended operating range (absolute maximum 13.5 V), with a 0.047 µF or larger ceramic bypass capacitor to GND recommended. |
| 2 | GND | power_in | Ground terminal for the regulator. |
| 3 | EN | input | Enable input, active low: 1.7 V or higher (up to VI) shuts the regulator down to 1 µA typical standby and 0.8 V or lower enables it. |
| 4 | FB | input | Feedback voltage input connected to an external resistor divider that sets the output (Vref = 0.6663 V typ), with FB input current of ±1 µA max. |
| 5 | OUT | power_out | Regulated output voltage adjustable from 0.7 V to 5.5 V at up to 100 mA, requiring at least 4.7 µF output capacitance with ESR of 0.3 Ω to 1.5 Ω for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management ICs |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage | VO | 0.97 | 1.03 | V | 0.7 V ≤ VO ≤ 5.5 V, TJ = −40°C to 125°C (limits are 0.97VO and 1.03VO) | 3 | |
| Quiescent current (GND current) | 23 | µA | EN = 0V, TJ = 25°C, 10 µA < IO < 100 mA | 3 | |||
| Quiescent current (GND current) | 30 | µA | EN = 0 V, TJ = −40°C to 125°C, 10 µA < IO < 100 mA | 3 | |||
| Load regulation | 12 | mV | EN = 0 V, TJ = 25°C, 10 µA < IO < 100 mA | 3 | |||
| Output voltage line regulation | ΔVO/VO | 0.04 | %/V | 2.7 V < VI ≤ 10 V, TJ = 25°C, See Note 4 | 3 | ||
| Output voltage line regulation | ΔVO/VO | 0.1 | %/V | 2.7 V < VI ≤ 10 V, TJ = −40°C to 125°C, See Note 4 | 3 | ||
| Output noise voltage | 60 | µVRMS | BW = 300 Hz to 50 kHz, Co = 10 µF, VO = 0.7 V, TJ = 25°C | 3 | |||
| Output current limit | 350 | 750 | mA | VO = 0 V, See Note 4 | 3 | ||
| Standby current | 1 | µA | EN = VI, 2.7 < VI < 10 V | 3 | |||
| Standby current | 2 | µA | TJ = −40°C to 125°C | 3 | |||
| FB input current | -1 | 1 | µA | FB = 0.666 V | 3 | ||
| High level enable input voltage | 1.7 | V | 2.7 V < VI < 10 V | 3 | |||
| Low level enable input voltage | 0.8 | V | 2.7 V < VI < 10 V | 3 | |||
| Power supply ripple rejection | 60 | dB | f = 1 kHz, Co = 10 µF, TJ = 25°C, See Note 4 | 3 | |||
| Input current (EN) | -1 | 0 | 1 | µA | EN = 0 V | 3 | |
| Input current (EN) | -1 | 1 | µA | EN = VI | 3 | ||
| Input voltage | VI | 2.7 | 10 | V | see Note 2 | 2 | |
| Output voltage range | VO | 0.7 | 5.5 | V | 2 | ||
| Continuous output current | IO | 0.01 | 100 | mA | see Note 3 | 2 | |
| Operating junction temperature | TJ | -40 | 125 | °C | 2 | ||
| Input voltage range | VI | -0.3 | 13.5 | V | 2 | ||
| Voltage range at EN | -0.3 | 0.3 | V | −0.3 V to VI + 0.3 V | 2 | ||
| Voltage on OUT, FB | 7 | V | 2 | ||||
| ESD rating, HBM | 2 | kV | 2 | ||||
| Operating virtual junction temperature range | TJ | -40 | 150 | °C | 2 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 2 | ||
| Thermal resistance junction-to-case | RθJC | 65.8 | °C/W | DBV package | 2 | ||
| Thermal resistance junction-to-ambient, Low K board | RθJA | 259 | °C/W | DBV, JEDEC Low K (1s) | 2 | ||
| Thermal resistance junction-to-ambient, High K board | RθJA | 180 | °C/W | DBV, JEDEC High K (2s2p) | 2 |
CAD (KiCad official)
- Symbol:
TPS76201DBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps76201dbvr-etched.step/tps76201dbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps76201dbvr.step/tps76201dbvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (17 pp, sha256
03631e58b412bfd0, retrieved 2026-10-26, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS76201DBVR
**Texas Instruments** · Linear Voltage Regulators (LDO) · SOT-23-5
TPS76201DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input supply voltage, 2.7 V to 10 V recommended operating range (absolute maximum 13.5 V), with a 0.047 µF or larger ceramic bypass capacitor to GND recommended. |
| 2 | GND | power_in | Ground terminal for the regulator. |
| 3 | EN | input | Enable input, active low: 1.7 V or higher (up to VI) shuts the regulator down to 1 µA typical standby and 0.8 V or lower enables it. |
| 4 | FB | input | Feedback voltage input connected to an external resistor divider that sets the output (Vref = 0.6663 V typ), with FB input current of ±1 µA max. |
| 5 | OUT | power_out | Regulated output voltage adjustable from 0.7 V to 5.5 V at up to 100 mA, requiring at least 4.7 µF output capacitance with ESR of 0.3 Ω to 1.5 Ω for stability. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management ICs |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage | VO | 0.97 | | 1.03 | V | 0.7 V ≤ VO ≤ 5.5 V, TJ = −40°C to 125°C (limits are 0.97VO and 1.03VO) | 3 |
| Quiescent current (GND current) | | | 23 | | µA | EN = 0V, TJ = 25°C, 10 µA < IO < 100 mA | 3 |
| Quiescent current (GND current) | | | | 30 | µA | EN = 0 V, TJ = −40°C to 125°C, 10 µA < IO < 100 mA | 3 |
| Load regulation | | | 12 | | mV | EN = 0 V, TJ = 25°C, 10 µA < IO < 100 mA | 3 |
| Output voltage line regulation | ΔVO/VO | | 0.04 | | %/V | 2.7 V < VI ≤ 10 V, TJ = 25°C, See Note 4 | 3 |
| Output voltage line regulation | ΔVO/VO | | | 0.1 | %/V | 2.7 V < VI ≤ 10 V, TJ = −40°C to 125°C, See Note 4 | 3 |
| Output noise voltage | | | 60 | | µVRMS | BW = 300 Hz to 50 kHz, Co = 10 µF, VO = 0.7 V, TJ = 25°C | 3 |
| Output current limit | | 350 | | 750 | mA | VO = 0 V, See Note 4 | 3 |
| Standby current | | | 1 | | µA | EN = VI, 2.7 < VI < 10 V | 3 |
| Standby current | | | | 2 | µA | TJ = −40°C to 125°C | 3 |
| FB input current | | -1 | | 1 | µA | FB = 0.666 V | 3 |
| High level enable input voltage | | 1.7 | | | V | 2.7 V < VI < 10 V | 3 |
| Low level enable input voltage | | | | 0.8 | V | 2.7 V < VI < 10 V | 3 |
| Power supply ripple rejection | | | 60 | | dB | f = 1 kHz, Co = 10 µF, TJ = 25°C, See Note 4 | 3 |
| Input current (EN) | | -1 | 0 | 1 | µA | EN = 0 V | 3 |
| Input current (EN) | | -1 | | 1 | µA | EN = VI | 3 |
| Input voltage | VI | 2.7 | | 10 | V | see Note 2 | 2 |
| Output voltage range | VO | 0.7 | | 5.5 | V | | 2 |
| Continuous output current | IO | 0.01 | | 100 | mA | see Note 3 | 2 |
| Operating junction temperature | TJ | -40 | | 125 | °C | | 2 |
| Input voltage range | VI | -0.3 | | 13.5 | V | | 2 |
| Voltage range at EN | | -0.3 | | 0.3 | V | −0.3 V to VI + 0.3 V | 2 |
| Voltage on OUT, FB | | | | 7 | V | | 2 |
| ESD rating, HBM | | | | 2 | kV | | 2 |
| Operating virtual junction temperature range | TJ | -40 | | 150 | °C | | 2 |
| Storage temperature range | Tstg | -65 | | 150 | °C | | 2 |
| Thermal resistance junction-to-case | RθJC | | 65.8 | | °C/W | DBV package | 2 |
| Thermal resistance junction-to-ambient, Low K board | RθJA | | 259 | | °C/W | DBV, JEDEC Low K (1s) | 2 |
| Thermal resistance junction-to-ambient, High K board | RθJA | | 180 | | °C/W | DBV, JEDEC High K (2s2p) | 2 |
## CAD (KiCad official)
- Symbol: `TPS76201DBVR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `tps76201dbvr-etched.step` / `tps76201dbvr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps76201dbvr.step` / `tps76201dbvr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps76201.pdf) (17 pp, sha256 `03631e58b412bfd0`, retrieved 2026-10-26, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps76201dbvr-datasheet.pdf)