TPS76133DBVR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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README
markdownTPS76133DBVR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TPS76133DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Unregulated input voltage supply. Recommended operating range 3.68 V to 16 V for the TPS76133; absolute maximum -0.3 V to 16 V. A bypass capacitor to GND is recommended. |
| 2 | GND | power_in | Device ground reference. All voltages are referenced to this pin. |
| 3 | EN | input | Active-high enable input. Drive above 2 V to enable the regulator; drive below 0.8 V to place the device in shutdown (<1 µA standby current). Voltage range -0.3 V to VI + 0.3 V; input current typically 2.5 µA at EN = VI. |
| 4 | NC | unconnected | No internal connection. Leave floating or tie to GND. |
| 5 | OUT | power_out | Regulated 3.3-V output (3.26 V to 3.34 V typical at TJ = 25°C). Supplies up to 100 mA continuous output current with an internal current limit of 100-135 mA. Requires an output capacitor (typ. 4.7 µF) for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | PMIC |
| Pins | 5 |
Ordering variants
Same part, different packaging or reel option.
TPS76133DBVRTPS76133DBVRDBVT
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage | VO | 3.26 | 3.3 | 3.34 | V | TJ = 25°C | 3 |
| Output voltage | VO | 3.21 | 3.34 | V | TJ = 25°C, 1 mA < IO < 100 mA | 3 | |
| Output voltage | VO | 3.18 | 3.4 | V | 1 mA < IO < 100 mA | 3 | |
| Standby current | II(standby) | 1 | µA | EN = 0 V | 3 | ||
| Quiescent current (GND current) | 90 | 115 | µA | IO = 0 mA, TJ = 25°C | 3 | ||
| Quiescent current (GND current) | 130 | µA | IO = 0 mA | 3 | |||
| Quiescent current (GND current) | 100 | 130 | µA | IO = 1 mA, TJ = 25°C | 3 | ||
| Quiescent current (GND current) | 170 | µA | IO = 1 mA | 3 | |||
| Quiescent current (GND current) | 190 | 220 | µA | IO = 10 mA, TJ = 25°C | 3 | ||
| Quiescent current (GND current) | 260 | µA | IO = 10 mA | 3 | |||
| Quiescent current (GND current) | 850 | 1100 | µA | IO = 50 mA, TJ = 25°C | 3 | ||
| Quiescent current (GND current) | 1200 | µA | IO = 50 mA | 3 | |||
| Quiescent current (GND current) | 2600 | 3600 | µA | IO = 100 mA, TJ = 25°C | 3 | ||
| Quiescent current (GND current) | 4000 | µA | IO = 100 mA | 3 | |||
| Input regulation | 3 | 10 | mV | 4.3 V < VI < 16, IO = 1 mA | 3 | ||
| Dropout voltage | 1 | 3 | mV | IO = 0 mA, TJ = 25°C | 4 | ||
| Dropout voltage | 5 | mV | IO = 0 mA | 4 | |||
| Dropout voltage | 7 | 10 | mV | IO = 1 mA, TJ = 25°C | 4 | ||
| Dropout voltage | 15 | mV | IO = 1 mA | 4 | |||
| Dropout voltage | 40 | 60 | mV | IO = 10 mA, TJ = 25°C | 4 | ||
| Dropout voltage | 90 | mV | IO = 10 mA | 4 | |||
| Dropout voltage | 120 | 150 | mV | IO = 50 mA, TJ = 25°C | 4 | ||
| Dropout voltage | 180 | mV | IO = 50 mA | 4 | |||
| Dropout voltage | 170 | 240 | mV | IO = 100 mA, TJ = 25°C | 4 | ||
| Dropout voltage | 280 | mV | IO = 100 mA | 4 | |||
| Peak output current / current limit | 100 | 125 | 135 | mA | 4 | ||
| High level enable input | 2 | V | 4 | ||||
| Low level enable input | 0.8 | V | 4 | ||||
| Input current (EN) | II | -1 | 0 | 1 | µA | EN = 0 V | 4 |
| Input current (EN) | II | 2.5 | 5 | µA | EN = VI | 4 | |
| Input voltage range | VI | -0.3 | 16 | V | See Note 1: voltages with respect to GND pin | 2 | |
| Voltage range at EN | -0.3 | V | Upper limit printed as VI + 0.3 V | 2 | |||
| Operating junction temperature range | TJ | -40 | 150 | °C | 2 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 2 | ||
| ESD rating, HBM | 1.5 | kV | Human body model | 2 | |||
| Input voltage (TPS76133) | VI | 3.68 | 16 | V | TPS76133 | 2 | |
| Continuous output current | IO | 0 | 100 | mA | 2 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 2 | ||
| Junction-to-ambient thermal resistance (DBV) | RθJA | 259 | °C/W | Low K (1s) JEDEC board | 2 | ||
| Junction-to-ambient thermal resistance (DBV) | RθJA | 180 | °C/W | High K (2s2p) JEDEC board | 2 | ||
| Junction-to-case thermal resistance (DBV) | RθJC | 65.8 | °C/W | Low K (1s) JEDEC board | 2 |
CAD (KiCad official)
- Symbol:
TPS76133DBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps76133dbvr-etched.step/tps76133dbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps76133dbvr.step/tps76133dbvr.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
tps76133dbvr.step |
85 KB | You want the bare part, or you mark your own boards. |
tps76133dbvr-etched.step |
2.3 MB | You want the part with TPS76133DBVR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 558 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (18 pp, sha256
87df92d7cddaeb80, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).