# TPS76050DBVR

**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS76050DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Input voltage pin; the TPS76050 recommended input range is 5.2 V to 16 V, with an absolute maximum of 16 V. |
| 2 | GND | power_in | Ground reference pin; all voltages are measured with respect to this pin. |
| 3 | EN | input | Enable input; a logic low (0.8 V maximum) shuts the regulator off, and EN must not be left floating. |
| 4 | NC | unconnected | No internal connection. |
| 5 | OUT | output | Regulated output voltage; requires a 2.2 µF minimum output capacitor with ESR between 0.1 Ω and 20 Ω. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage | VO | 4.95 | 5 | 5.05 | V | TJ = 25°C | 3 |
| Output voltage | VO | 4.91 |  | 5.05 | V | TJ = 25°C, 1 mA < IO < 50 mA | 3 |
| Output voltage | VO | 4.89 |  | 5.1 | V | 1 mA < IO < 50 mA | 3 |
| Input regulation |  |  | 3 | 10 | mV | 6 V < VI < 16, IO = 1 mA | 3 |
| Dropout voltage | VDO |  | 1 | 3 | mV | IO = 0 mA, TJ = 25°C | 3 |
| Dropout voltage | VDO |  |  | 5 | mV | IO = 0 mA | 3 |
| Dropout voltage | VDO |  | 7 | 10 | mV | IO = 1 mA, TJ = 25°C | 3 |
| Dropout voltage | VDO |  |  | 15 | mV | IO = 1 mA | 3 |
| Dropout voltage | VDO |  | 40 | 60 | mV | IO = 10 mA, TJ = 25°C | 3 |
| Dropout voltage | VDO |  |  | 90 | mV | IO = 10 mA | 3 |
| Dropout voltage | VDO |  | 120 | 150 | mV | IO = 50 mA, TJ = 25°C | 3 |
| Dropout voltage | VDO |  |  | 180 | mV | IO = 50 mA | 3 |
| Quiescent current (GND current) | IQ |  | 90 | 115 | µA | IO = 0 mA, TJ = 25°C | 3 |
| Quiescent current (GND current) | IQ |  |  | 130 | µA | IO = 0 mA | 3 |
| Quiescent current (GND current) | IQ |  | 100 | 130 | µA | IO = 1 mA, TJ = 25°C | 3 |
| Quiescent current (GND current) | IQ |  |  | 170 | µA | IO = 1 mA | 3 |
| Quiescent current (GND current) | IQ |  | 190 | 215 | µA | IO = 10 mA, TJ = 25°C | 3 |
| Quiescent current (GND current) | IQ |  |  | 260 | µA | IO = 10 mA | 3 |
| Quiescent current (GND current) | IQ |  | 850 | 1100 | µA | IO = 50 mA, TJ = 25°C | 3 |
| Quiescent current (GND current) | IQ |  |  | 1200 | µA | IO = 50 mA | 3 |
| Standby current | II(standby) |  |  | 1 | µA | EN = 0 V | 3 |
| Peak output current/current limit |  | 100 | 125 | 135 | mA |  | 3 |
| High level enable input |  | 2 |  |  | V |  | 3 |
| Low level enable input |  |  |  | 0.8 | V |  | 3 |
| Input current (EN) | II | -1 | 0 | 1 | µA | EN = 0 V | 3 |
| Input current (EN) | II |  | 2.5 | 5 | µA | EN = VI | 3 |
| Input voltage | VI | 5.2 |  | 16 | V | TPS76050 | 2 |
| Continuous output current | IO | 0 |  | 50 | mA |  | 2 |
| Operating junction temperature | TJ | -40 |  | 125 | °C |  | 2 |
| Input voltage range | VI | -0.3 |  | 16 | V | All voltages with respect to device GND pin | 2 |
| Operating junction temperature range | TJ | -40 |  | 150 | °C |  | 2 |
| Storage temperature range | Tstg | -65 |  | 150 | °C |  | 2 |
| ESD rating, HBM |  |  |  | 1.5 | kV | Human body model | 2 |
| Junction-to-ambient thermal resistance, Low K board | RθJA |  | 259 |  | °C/W | DBV package, JEDEC Low K (1s) board | 2 |
| Junction-to-ambient thermal resistance, High K board | RθJA |  | 180 |  | °C/W | DBV package, JEDEC High K (2s2p) board | 2 |
| Junction-to-case thermal resistance | RθJC |  | 65.8 |  | °C/W | DBV package | 2 |
| Output capacitor (minimum recommended) | CO | 2.2 |  |  | µF | Minimum recommended value for stability | 9 |
| Output capacitor ESR | ESR | 0.1 |  | 20 | Ω | Output capacitor equivalent series resistance requirement | 9 |
| Input capacitor (recommended) | CI | 0.047 |  |  | µF | Ceramic decoupling capacitor between IN and GND | 9 |
| Over temperature protection threshold |  |  |  | 160 | °C | Thermal shutdown when junction temperature exceeds | 9 |

## CAD (KiCad official)

- Symbol: `TPS76050DBVR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `tps76050dbvr-etched.step` / `tps76050dbvr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps76050dbvr.step` / `tps76050dbvr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps760.pdf) (17 pp, sha256 `0307a6a83756359f`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps76050dbvr-datasheet.pdf)