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Contents

README

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TPS75818KTTR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-263-5

TPS75818KTTR from Texas Instruments, in a TO-263-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Enable input: a high level above 2 V enables the regulator, and a low level below 0.7 V shuts it down to quiescent current below 1 µA at TJ = +25°C.
2 IN power_in Input supply to the regulator; the input voltage range is 2.8 V to 5.5 V, and the absolute maximum is −0.3 V to 6 V.
3 GND power_in Ground reference pin for the regulator.
4 OUT power_out Regulated output voltage; an output capacitor of at least 47 µF with ESR of at least 200 mΩ is required between OUT and GND for stability.
5 FB/NC input Feedback input for the adjustable device (1.22 V to 5 V output); connect to GND or leave open for fixed-VOUT devices such as the TPS75818.
6 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TO-263-5
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VOUT accuracy VOUT -3 3 % VOUT + 1V ≤ VIN ≤ 5.5V, 1mA ≤ IOUT ≤ 3A 3
Input voltage range VIN 2.8 5.5 V 3
Line regulation ∆VOUT%/∆VIN 0.04 0.1 %/V VOUT + 1V ≤ VIN < 5.5V 3
Load regulation ∆VOUT%/∆IOUT 0.15 % 1mA ≤ IOUT ≤ 3A 3
Output current limit ICL 5.5 10 14 A VOUT = 0V 3
Ground pin current IGND 125 200 µA 1mA ≤ IOUT ≤ 3A 3
Shutdown current (IGND) ISHDN 0.1 3 µA VEN = 0V 3
Enable high (enabled) VEN(HI) 2 V 3
Enable low (shutdown) VEN(LO) 0.7 V 3
Enable pin current (enabled) IEN(HI) -1 1 µA VEN = VIN 3
Enable pin current (shutdown) IEN(HI) -1 0 1 µA VEN = 0V 3
Output discharge transistor current 10 25 mA TJ = +25°C, VOUT = 1.5V 3
Undervoltage lockout (rising) UVLO 2.2 2.75 V TJ = +25°C, VIN rising 3
Undervoltage lockout hysteresis UVLO 100 mV VIN falling 3
Operating junction temperature TJ -40 125 °C 3
Input voltage VIN -0.3 6 V 2
Enable voltage VEN -0.3 6 V 2
Output voltage (OUT, FB) VOUT 5.5 V 2
Operating junction temperature range TJ -40 150 °C 2
Storage temperature range TSTG -65 150 °C 2
ESD rating, HBM 2 kV HBM 2
ESD rating, CDM 500 V CDM 2
Junction-to-case thermal resistance (TO-263) RΘJC 2 °C/W TO-263 (KTT) package 2
Junction-to-ambient thermal resistance (TO-263) RΘJA 38.7 °C/W Horizontally-mounted TO-263 with pins soldered, no copper pad underneath, JEDEC High-K board 2

CAD (KiCad official)

  • Symbol: TPS75818KTTR
  • Footprint: Package_TO_SOT_SMD:TO-263-5_TabPin6
  • 3D model: TO-263-5 (KiCad packages3D, STEP)
  • 3D model files: tps75818kttr-etched.step / tps75818kttr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps75818kttr.step / tps75818kttr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 7b3b54a9bcac2968, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF