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TPS75433QPWPR

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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS75433QPWPR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-20

TPS75433QPWPR from Texas Instruments, in a HTSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND/HEATSINK power_in Ground/heatsink terminal connected directly to the mount pad for thermal-enhanced operation; it can be connected to GND or left floating.
2 NC unconnected Not connected.
3 IN power_in Input voltage terminal; the absolute maximum input voltage range is -0.3 V to +6 V, and a 0.22 μF to 1 μF input bypass capacitor should be placed as close to the input pins as possible.
4 IN power_in Input voltage terminal; the absolute maximum input voltage range is -0.3 V to +6 V, and a 0.22 μF to 1 μF input bypass capacitor should be placed as close to the input pins as possible.
5 EN input Negative-polarity enable input: the device is enabled when EN is logic low and shut down when EN is logic high; the absolute maximum EN voltage range is -0.3 V to +16.5 V.
6 PG output Open-drain, active-high power-good output (TPS754xxQ) that goes high-impedance when VOUT reaches 83% of the regulated voltage and requires a pullup resistor; the absolute maximum PG voltage is 16.5 V.
7 FB/SENSE input Sense input for the fixed-output options, which must be connected to the regulator output with the shortest possible connection; on the adjustable version this pin is the feedback input for the external resistor divider.
8 OUTPUT power_out Regulated output voltage; the absolute maximum OUT voltage is 5.5 V and an output capacitor of at least 47 μF with ESR between 100 mΩ and 10 Ω is required between OUT and GND.
9 OUTPUT power_out Regulated output voltage; the absolute maximum OUT voltage is 5.5 V and an output capacitor of at least 47 μF with ESR between 100 mΩ and 10 Ω is required between OUT and GND.
10 GND/HEATSINK power_in Ground/heatsink terminal connected directly to the mount pad for thermal-enhanced operation; it can be connected to GND or left floating.
11 GND/HEATSINK power_in Ground/heatsink terminal connected directly to the mount pad for thermal-enhanced operation; it can be connected to GND or left floating.
12 NC unconnected Not connected.
13 NC unconnected Not connected.
14 NC unconnected Not connected.
15 NC unconnected Not connected.
16 NC unconnected Not connected.
17 GND power_in Ground terminal for the regulator.
18 NC unconnected Not connected.
19 NC unconnected Not connected.
20 GND/HEATSINK power_in Ground/heatsink terminal connected directly to the mount pad for thermal-enhanced operation; it can be connected to GND or left floating.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-20
Category Power Management (PMIC)
Pins 21

CAD (KiCad official)

  • Symbol: TPS75433QPWPR
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: HTSSOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tps75433qpwpr-etched.step / tps75433qpwpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps75433qpwpr.step / tps75433qpwpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 ddac75f3b3fd04bf, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF