component
TPS75315QPWP
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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TPS75315QPWP
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-20-EP
TPS75315QPWP from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND/HEATSINK | power_in | Ground/heatsink terminal connected directly to the mount pad for thermal-enhanced operation; it can be connected to GND or left floating. |
| 2 | NC | unconnected | Not connected internally. |
| 3 | IN | power_in | Regulator input voltage; absolute maximum VIN is -0.3 V to +6 V, and a 0.22 µF to 1 µF input bypass capacitor is recommended placed as close to the input pins as possible. |
| 4 | IN | power_in | Regulator input voltage; absolute maximum VIN is -0.3 V to +6 V, and a 0.22 µF to 1 µF input bypass capacitor is recommended placed as close to the input pins as possible. |
| 5 | EN | input | Negative-polarity enable input: a logic low enables the device and a logic high shuts it down; the voltage at EN is limited to -0.3 V to +16.5 V. |
| 6 | PG/RESET | output | On the TPS751xxQ (this part's family) this is an active-high open-drain power-good output that goes high-impedance when VOUT reaches 83% of its regulated voltage and needs a pullup resistor; the maximum PG voltage is 16.5 V. |
| 7 | FB/SENSE | input | For fixed-output versions this is the SENSE input, which must be connected to the regulator output as close as possible and routed to avoid noise pickup (RC filtering between SENSE and VOUT is not recommended). |
| 8 | OUTPUT | power_out | Regulated output voltage; the output voltage range at OUT is limited to 5.5 V maximum, and an output capacitor of at least 47 µF with ESR between 100 mΩ and 10 Ω is required between OUT and GND. |
| 9 | OUTPUT | power_out | Regulated output voltage; the output voltage range at OUT is limited to 5.5 V maximum, and an output capacitor of at least 47 µF with ESR between 100 mΩ and 10 Ω is required between OUT and GND. |
| 10 | GND/HEATSINK | power_in | Ground/heatsink terminal connected directly to the mount pad for thermal-enhanced operation; it can be connected to GND or left floating. |
| 11 | GND/HEATSINK | power_in | Ground/heatsink terminal connected directly to the mount pad for thermal-enhanced operation; it can be connected to GND or left floating. |
| 12 | NC | unconnected | Not connected internally. |
| 13 | NC | unconnected | Not connected internally. |
| 14 | NC | unconnected | Not connected internally. |
| 15 | NC | unconnected | Not connected internally. |
| 16 | NC | unconnected | Not connected internally. |
| 17 | GND | power_in | Ground reference for the regulator; all voltages are specified with respect to network terminal ground. |
| 18 | NC | unconnected | Not connected internally. |
| 19 | NC | unconnected | Not connected internally. |
| 20 | GND/HEATSINK | power_in | Ground/heatsink terminal connected directly to the mount pad for thermal-enhanced operation; it can be connected to GND or left floating. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20-EP |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
TPS75315QPWP - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
tps75315qpwp-etched.step/tps75315qpwp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps75315qpwp.step/tps75315qpwp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (33 pp, sha256
b617566af7058336, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).