component
TPS74601PBQWDRVRQ1
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownTPS74601PBQWDRVRQ1
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)
TPS74601PBQWDRVRQ1 from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output voltage pin; a capacitor is required from OUT to ground for stability, using at least 1 µF ceramic (minimum derated 0.47 µF) and up to 220 µF. |
| 2 | FB | input | Feedback input to the control-loop error amplifier that sets the output voltage of the adjustable version, which spans 0.55 V to 5.5 V. |
| 3 | GND | power_in | Ground pin, which is also the electrical node of the thermal pad and should be connected to the GND plane for thermal performance. |
| 4 | EN | input | Enable pin; drive above VEN(HI) to turn the regulator on and below VEN(LO) to put the LDO into shutdown, with VEN rated 0 V to 6.0 V. |
| 5 | PG | output | Open-drain power-good output (the B suffix denotes a 5-ms delay) that requires a pull-up resistor, rated for VPG of 0 V to 6.0 V and IPG of ±10 mA. |
| 6 | IN | power_in | Input supply pin with a recommended input voltage of 1.5 V to 6.0 V and absolute maximum of 6.5 V; use at least a 1 µF ceramic capacitor from IN to ground placed close to the device. |
| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
CAD (KiCad official)
- Symbol:
TPS74601PBQWDRVRQ1 - Footprint:
Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm - 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
tps74601pbqwdrvrq1-etched.step/tps74601pbqwdrvrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps74601pbqwdrvrq1.step/tps74601pbqwdrvrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (48 pp, sha256
184c3108e6b0527b, retrieved 2026-10-10, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).