component
TPS74401MRGWREP
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, VQFN-20-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS74401MRGWREP
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · VQFN-20-EP(5x5)
TPS74401MRGWREP from Texas Instruments, in a VQFN-20-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output voltage; stable with low-cost ceramic or no output capacitor; internally current limited to 3.5 A. |
| 2 | NC | unconnected | No connection; pin can be left floating or grounded for improved thermal contact. |
| 3 | NC | unconnected | No connection; pin can be left floating or grounded for improved thermal contact. |
| 4 | NC | unconnected | No connection; pin can be left floating or grounded for improved thermal contact. |
| 5 | IN | power_in | Unregulated input supply voltage; range -0.3 to +6 V; minimum input voltage is VOUT + 115 mV dropout; supports inputs as low as 0.9 V with external BIAS supply. |
| 6 | IN | power_in | Unregulated input supply voltage; range -0.3 to +6 V; minimum input voltage is VOUT + 115 mV dropout; supports inputs as low as 0.9 V with external BIAS supply. |
| 7 | IN | power_in | Unregulated input supply voltage; range -0.3 to +6 V; minimum input voltage is VOUT + 115 mV dropout; supports inputs as low as 0.9 V with external BIAS supply. |
| 8 | IN | power_in | Unregulated input supply voltage; range -0.3 to +6 V; minimum input voltage is VOUT + 115 mV dropout; supports inputs as low as 0.9 V with external BIAS supply. |
| 9 | PG | tri_state | Power-good open-drain active-high output indicating VOUT status; range -0.3 to +6 V; sink current 0 to +1.5 mA; requires pull-up resistor 10kΩ to 1MΩ. |
| 10 | BIAS | power_in | Bias input voltage for error amplifier, reference, and internal control circuits; range -0.3 to +6 V. |
| 11 | EN | input | Enable pin; voltage range -0.3 to +6 V; high enables regulator, low puts device into shutdown mode; must not be left floating. |
| 12 | GND | power_in | Ground reference; connect to ground plane for thermal performance and low-impedance return path. |
| 13 | NC | unconnected | No connection; pin can be left floating or grounded for improved thermal contact. |
| 14 | NC | unconnected | No connection; pin can be left floating or grounded for improved thermal contact. |
| 15 | SS | input | Soft-start pin; external capacitor sets startup ramp time; range -0.3 to +6 V; if left floating, default ramp time is approximately 100 ms. |
| 16 | FB | input | Feedback pin for output voltage programming via external resistor divider network; range -0.3 to +6 V; must not be left floating. |
| 17 | NC | unconnected | No connection; pin can be left floating or grounded for improved thermal contact. |
| 18 | OUT | power_out | Regulated output voltage; stable with low-cost ceramic or no output capacitor; internally current limited to 3.5 A. |
| 19 | OUT | power_out | Regulated output voltage; stable with low-cost ceramic or no output capacitor; internally current limited to 3.5 A. |
| 20 | OUT | power_out | Regulated output voltage; stable with low-cost ceramic or no output capacitor; internally current limited to 3.5 A. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-20-EP(5x5) |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
TPS74401MRGWREP - Footprint:
Package_DFN_QFN:QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm - 3D model: VQFN-20-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
tps74401mrgwrep-etched.step/tps74401mrgwrep-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps74401mrgwrep.step/tps74401mrgwrep.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (27 pp, sha256
4c6146c0e3d8b11d, retrieved 2026-10-06, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).