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docs tps73733dcqr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json tps73733dcqr: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray
README.md tps73733dcqr: specified limits as data (metadata.characteristics, 21 rows from the datasheet) · Ray
tps73733dcqr-etched.fit.json tps73733dcqr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tps73733dcqr-etched.glb tps73733dcqr: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray
tps73733dcqr-etched.step tps73733dcqr: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray
tps73733dcqr.glb fix footprint: SOT-223-3_TabPin2 -> SOT-223-6 (pad_count, 6 pins) · Ray
tps73733dcqr.kicad_mod fix footprint: SOT-223-3_TabPin2 -> SOT-223-6 (pad_count, 6 pins) · Ray
tps73733dcqr.kicad_sym Publish 0.1.0 · Ray
tps73733dcqr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tps73733dcqr.step fix footprint: SOT-223-6 -> SOT-223-6 (3d refresh; body regenerated from the footprint F.Fab outline) · Ray

TPS73733DCQR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-6

TPS73733DCQR from Texas Instruments, in a SOT-223-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Regulator input supply. Accepts 2.2V to 5.5V (absolute max 6.0V). Bypass to GND with a low-ESR ceramic capacitor close to the pin.
2 OUT power_out Regulated 3.3V output, up to 1A. Requires a 1.0µF or larger ceramic output capacitor for stability. Dropout is ~130mV typ at 1A.
3 GND power_in Device ground reference. Tab (pin 6) is also GND and should be tied to this net through the PCB copper for thermal dissipation.
4 NR/FB input On fixed-output versions (TPS73733) this pin is the noise-reduction (NR) node - an optional bypass capacitor to GND lowers output noise. On the adjustable TPS73701 the same pin becomes the feedback (FB) input from an external R1/R2 divider (V_FB internal reference ≈ 1.198-1.210V).
5 EN input Enable input, active high. V_EN(HI) ≥ 1.7V enables the regulator; V_EN(LO) ≤ 0.5V forces shutdown (I_SHDN ≈ 20nA typ). Do not float. Absolute max −0.3V to +6.0V.
6 GND (TAB) power_in SOT-223 metal tab, internally tied to GND. Solder to a copper ground pour for thermal dissipation; must be electrically bonded to GND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-223-6
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • TPS73733DCQR
  • TPS73733DCQRDRB
  • TPS73733DCQRDRBT
  • TPS73733DCQRDRBR
  • TPS73733DCQRDRV
  • TPS73733DCQRDRVT
  • TPS73733DCQRDRVR

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Nominal output voltage accuracy (TJ = +25°C) -1 1 % TJ = +25°C 4
Overall output accuracy over line, load and temperature -3 3 % Over VIN, IOUT and temperature; VOUT + 0.5V ≤ VIN ≤ 5.5V; 10mA ≤ IOUT ≤ 1A 4
Input voltage range VIN 2.2 5.5 V 4
Dropout voltage VDO 130 500 mV IOUT = 1A (VIN = VOUT(nom) – 0.1V) 4
Output current limit ICL 1.05 1.6 2.2 A VOUT = 0.9 × VOUT(nom) 4
EN pin high (enabled) voltage VEN(HI) 1.7 V 4
EN pin low (shutdown) voltage VEN(LO) 0 0.5 V 4
Operating junction temperature TJ -40 125 °C 4
Input voltage range (absolute maximum) -0.3 6 V VIN range 2
EN voltage range (absolute maximum) -0.3 6 V VEN range 2
Output voltage range (absolute maximum) -0.3 5.5 V VOUT range 2
NR/FB voltage range (absolute maximum) VNR, VFB -0.3 6 V VNR, VFB range 2
Junction temperature range (absolute maximum) TJ -55 150 °C 2
Storage temperature range -65 150 °C 2
ESD rating, HBM 2 kV Human body model 2
ESD rating, CDM 500 V Charged device model 2
Junction-to-ambient thermal resistance θJA 53.1 °C/W DCQ (SOT-223, 6 pins) package 3
Junction-to-case (top) thermal resistance θJCtop 35.2 °C/W DCQ (SOT-223, 6 pins) package 3
Junction-to-board thermal resistance θJB 7.8 °C/W DCQ (SOT-223, 6 pins) package 3
Junction-to-top characterization parameter ψJT 2.9 °C/W DCQ (SOT-223, 6 pins) package 3
Junction-to-board characterization parameter ψJB 7.7 °C/W DCQ (SOT-223, 6 pins) package 3

CAD (KiCad official)

  • Symbol: TPS73733DCQR
  • Footprint: Package_TO_SOT_SMD:SOT-223-6
  • 3D model: SOT-223-6 (KiCad packages3D, STEP)
  • 3D model files: tps73733dcqr-etched.step / tps73733dcqr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps73733dcqr.step / tps73733dcqr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tps73733dcqr.step 120 KB You want the bare part, or you mark your own boards.
tps73733dcqr-etched.step 2.2 MB You want the part with TPS73733DCQR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 534 faces against 36 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 d13584b386b9f8d9, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF