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TPS73633MDBVREP

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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS73633MDBVREP

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS73633MDBVREP from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Unregulated input supply; the datasheet gives an input voltage range of 1.7 V to 5.5 V.
2 GND power_in Ground pin for the regulator.
3 EN input Enable input, active high: driving it high turns the regulator on and driving it low (VEN(LO) of 0 V to 0.5 V maximum) puts it in shutdown; it can be tied to IN if unused.
4 NR passive Noise reduction pin, available on the fixed-voltage versions only; an external capacitor (CNR) connected here filters the internal bandgap noise and reduces output noise.
5 OUT power_out Regulator output, which does not require an external output capacitor for stability.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage range VIN 1.7 5.5 V 5
Output accuracy, nominal -0.5 0.5 % TJ = 25°C 5
Output accuracy over line, load and temperature -1 0.5 1 % VOUT + 0.5V ≤ VIN ≤ 5.5V, 10mA ≤ IOUT ≤ 400mA 5
Dropout voltage VDO 75 200 mV VIN = VOUT(nom) – 0.1V, IOUT = 400mA 5
Output current limit ICL 400 650 800 mA VOUT = 0.9 × VOUT(nom) 5
Reverse leakage current (-IIN) IREV 0.1 15 μA VEN ≤ 0.5V, 0V ≤ VIN ≤ VOUT 5
Ground pin current IGND 400 550 μA IOUT = 10mA (IQ) 5
Ground pin current IGND 800 1000 μA IOUT = 400mA 5
Shutdown current (IGND) ISHDN 0.02 1 μA VEN ≤ 0.5V, VOUT ≤ VIN ≤ 5.5V 5
Enable input low threshold (shutdown) VEN(LO) 0 0.5 V 5
Enable input high threshold (enabled) VEN(HI) 1.7 V 5
Enable pin current (enabled) IEN(HI) 0.02 0.1 μA VEN = 5.5V 5
Operating ambient temperature TA -55 125 °C 5
Input voltage (absolute maximum) VIN -0.3 6 V 4
Enable voltage (absolute maximum) VEN -0.3 6 V 4
Output voltage (absolute maximum) VOUT -0.3 5.5 V 4
Junction temperature range TJ -55 150 °C 4
Storage temperature range -65 150 °C 4
ESD human body model (HBM) 2 kV Human body model 4
ESD charged device model (CDM) 500 V Charged device model 4
Junction-to-ambient thermal resistance RθJA 255 °C/W DBV package, low-K (1s) JEDEC board 4
Junction-to-ambient thermal resistance RθJA 180 °C/W DBV package, high-K (2s2p) JEDEC board 4
Junction-to-case thermal resistance RθJC 64 °C/W DBV package 4

CAD (KiCad official)

  • Symbol: TPS73633MDBVREP
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps73633mdbvrep-etched.step / tps73633mdbvrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps73633mdbvrep.step / tps73633mdbvrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 278ec49c0e903e99, retrieved 2026-10-10, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF