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TPS736125DRBR

Public Made by Adom

by adom

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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README.md Initial commit: component/tps736125drbr · Ray 21h ago
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tps736125drbr-hero.glb tps736125drbr: hero GLB from the etched model (keeps the MPN mark) · Ray 1h ago
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TPS736125DRBR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SON-8-EP(3x3)

TPS736125DRBR from Texas Instruments, in a SON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulator output; the device is stable without an external output capacitor.
2 N/C unconnected No internal connection on the DRB package; the pin is shown as N/C in the pin figure.
3 NR/FB passive On fixed-voltage versions this is NR, where an external noise-reduction capacitor to GND lowers output noise; on the adjustable version it is FB, the error-amplifier feedback input that sets the output voltage.
4 GND power_in Ground; the exposed thermal pad is also listed with this pin and should be connected to the ground plane for heat dissipation.
5 EN input Drive high to enable the regulator and low to place it in shutdown mode; if shutdown is not needed, connect EN to IN.
6 N/C unconnected No internal connection on the DRB package; the pin is shown as N/C in the pin figure.
7 N/C unconnected No internal connection on the DRB package; the pin is shown as N/C in the pin figure.
8 IN power_in Regulator input supply, operating from 1.7 V to 5.5 V.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SON-8-EP(3x3)
Category Power Management (PMIC)
Pins 9

CAD (KiCad official)

  • Symbol: TPS736125DRBR
  • Footprint: Package_SON:WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm
  • 3D model: SON-8-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps736125drbr-etched.step / tps736125drbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps736125drbr.step / tps736125drbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (49 pp, sha256 5ed5c95a399b519d, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF