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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	tps73401ddcr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
viewers	tps73401ddcr: viewers · Ray	1mo ago
package.json	tps73401ddcr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray	1mo ago
page.json	tps73401ddcr: specified limits as data (metadata.characteristics, 36 rows from the datasheet) · Ray	25d ago
README.md	tps73401ddcr: specified limits as data (metadata.characteristics, 36 rows from the datasheet) · Ray	25d ago
tps73401ddcr-etched.fit.json	tps73401ddcr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
tps73401ddcr-etched.glb	tps73401ddcr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
tps73401ddcr-etched.step	tps73401ddcr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
tps73401ddcr.glb	Publish 0.1.0 · Ray	1mo ago
tps73401ddcr.kicad_mod	Publish 0.1.0 · Ray	1mo ago
tps73401ddcr.kicad_sym	Publish 0.1.0 · Ray	1mo ago
tps73401ddcr.lbr	Publish 0.1.0 · Ray	1mo ago
tps73401ddcr.step	Publish 0.1.0 · Ray	1mo ago

TPS73401DDCR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TSOT-23-5

TPS73401DDCR from Texas Instruments, in a TSOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	IN	power_in	Input supply voltage; operating range 2.7V to 6.5V.
2	GND	power_in	Ground; must be tied to GND.
3	EN	input	Enable input; driving high turns on the regulator, driving low puts device in shutdown mode.
4	FB	input	Feedback input to control loop error amplifier for adjustable output voltage setting via external resistor divider.
5	OUT	output	Regulated output of the regulator; requires minimum 2.0µF ceramic capacitor to ground for stability.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSOT-23-5
Category	Power Management (PMIC)
Pins	5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input voltage range	VIN	2.7		6.5	V		3
Internal reference (TPS73401)	VFB	1.184	1.208	1.232	V		3
Output voltage range (TPS73401)	VOUT			6.3	V		3
Output accuracy, nominal	VOUT	-1		1	%	Nominal TJ = +25°C	3
Output accuracy, over line/load/temperature	VOUT	-2		2	%	Over VIN, VOUT + 0.3V ≤ VIN ≤ 6.5V; IOUT, Temp 1mA ≤ IOUT ≤ 250mA	3
Line regulation	ΔVOUT%/ ΔVIN			0.02	%/V	VOUT(NOM) + 0.3V ≤ VIN ≤ 6.5V	3
Load regulation	ΔVOUT%/ ΔIOUT			0.005	%/mA	500µA ≤ IOUT ≤ 250mA	3
Dropout voltage	VDO		125	219	mV	IOUT = 250mA (VIN = VOUT(NOM) – 0.1V)	3
Output current limit	ICL	300	580	900	mA	VOUT = 0.9 × VOUT(NOM)	3
Ground pin current	IGND		45	65	µA	500µA ≤ IOUT ≤ 250mA	3
Shutdown current (IGND)	ISHDN		0.15	1	µA	VEN ≤ 0.4V	3
Feedback pin current (TPS73401)	IFB	-0.5		0.5	µA		3
Enable high (enabled)	VEN(HI)	1.2			V		3
Enable low (shutdown)	VEN(LO)	0		0.4	V		3
Enable pin current, enabled	IEN(HI)		0.03	1	µA	VEN = VIN = 6.5V	3
Operating junction temperature	TJ	-40		125	°C		3
Undervoltage lock-out, VIN rising	UVLO	1.9	2.2	2.65	V	VIN rising	3
Input voltage range (absolute maximum)	VIN	-0.3		7	V		2
VEN range (absolute maximum)	VEN	-0.3			V	Printed as VIN + 0.3 V	2
VOUT range (absolute maximum)	VOUT	-0.3			V	Printed as VIN + 0.3 V	2
VFB range (absolute maximum)	VFB	-0.3			V	Printed as VFB (TYP) + 0.3 V	2
Junction temperature range (absolute maximum)	TJ	-55		150	°C		2
Storage junction temperature range	TSTG	-55		150	°C		2
ESD rating, HBM				2	kV	ESD rating, HBM	2
ESD rating, CDM				500	V	ESD rating, CDM	2
Power-supply rejection ratio, f = 100Hz	PSRR		60		dB	f = 100Hz; VIN = 3.85V, VOUT = 2.85V, NR = 0.01µF, IOUT = 100mA	3
Power-supply rejection ratio, f = 1kHz	PSRR		56		dB	f = 1kHz; VIN = 3.85V, VOUT = 2.85V, NR = 0.01µF, IOUT = 100mA	3
Power-supply rejection ratio, f = 10kHz	PSRR		41		dB	f = 10kHz; VIN = 3.85V, VOUT = 2.85V, NR = 0.01µF, IOUT = 100mA	3
Power-supply rejection ratio, f = 100kHz	PSRR		28		dB	f = 100kHz; VIN = 3.85V, VOUT = 2.85V, NR = 0.01µF, IOUT = 100mA	3
Startup time, CNR = none	TSTR		45		µs	CNR = none; VOUT = 0 ~ 90%, VOUT = 2.85V, RL = 14Ω, COUT = 2.2µF	3
Thermal shutdown temperature, temperature increasing	TSD		165		°C	Shutdown, temperature increasing	3
Thermal shutdown reset temperature, temperature decreasing	TSD		145		°C	Reset, temperature decreasing	3
UVLO hysteresis			70		mV	VIN falling	3
Junction-to-case thermal resistance, DDC package	RθJC		90		°C/W	DDC package	2
Junction-to-ambient thermal resistance, DDC, low-K board	RθJA		280		°C/W	DDC package; JEDEC low-K (1s) board	2
Junction-to-ambient thermal resistance, DDC, high-K board	RθJA		200		°C/W	DDC package; JEDEC high-K (2s2p) board	2

CAD (KiCad official)

Symbol: TPS73401DDCR
Footprint: Package_TO_SOT_SMD:TSOT-23-5
3D model: TSOT-23-5 (KiCad packages3D, STEP)
3D model files: tps73401ddcr-etched.step / tps73401ddcr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps73401ddcr.step / tps73401ddcr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (27 pp, sha256 d3aae21ede2d1c07, retrieved 2026-09-23, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF