component

TPS7330QDR

Public Made by Adom

by adom

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps7330qdrfactory-2.0.0extractor-text
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Generated by kicad-footprint-generator · KiCad file format 20260206
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README.md Initial commit: component/tps7330qdr · Ray 1mo ago
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tps7330qdr-etched.step tps7330qdr: factory component page (tier=lcsc) · Ray 1mo ago
tps7330qdr-hero.glb tps7330qdr: hero GLB from the etched model (keeps the MPN mark) · Ray 1mo ago
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TPS7330QDR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

TPS7330QDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Network ground pin; all voltage values in the datasheet are referenced to this terminal.
2 EN input Enable input where a logic-high signal shuts the regulator down and reduces quiescent current to 0.5 µA max at TJ = 25°C; absolute maximum rating is -0.3 V to 11 V.
3 IN power_in Unregulated input supply to the PMOS pass element; absolute maximum input voltage range is -0.3 V to 11 V.
4 IN power_in Second input supply pin, internally connected with pin 3 to the unregulated input; absolute maximum input voltage range is -0.3 V to 11 V.
5 OUT power_out Regulated output; the device supplies 0 mA to 500 mA of output current and should be tied to SENSE as close to the device as possible.
6 OUT power_out Second regulated output pin, internally connected with pin 5; supplies 0 mA to 500 mA of output current.
7 SENSE/FB input SENSE for the fixed-voltage options (TPS7330) to be tied externally to OUT as close to the device as possible; absolute maximum voltage is -0.3 V to 11 V.
8 RESET output Active-low open-drain NMOS reset output that goes low during an undervoltage condition and returns high after a 200-ms (typ) delay once the output recovers; absolute maximum voltage is -0.3 V to 11 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: TPS7330QDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tps7330qdr-etched.step / tps7330qdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps7330qdr.step / tps7330qdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (46 pp, sha256 64058afafde102b9, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF