component
TPS73250MDBVREP
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS73250MDBVREP
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TPS73250MDBVREP from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Unregulated input supply to the LDO, with an operating range of 1.7 V to 5.5 V and an absolute maximum of -0.3 V to 6 V. |
| 2 | GND | power_in | Ground connection for the regulator; the datasheet recommends separate ground planes for VIN and VOUT, each connected only to the GND pin. |
| 3 | EN | input | Enable pin, active high and TTL-CMOS compatible: driving it above 1.7 V turns the regulator on, and driving it below 0.5 V (maximum) puts it in shutdown; tie to IN if unused, with an absolute maximum of -0.3 V to 6 V. |
| 4 | NR/FB | passive | For the fixed-voltage versions (including TPS73250) this is the NR noise-reduction pin, where an external capacitor to GND filters the internal reference noise; on the adjustable version this same pin is the FB feedback input that sets the output voltage. |
| 5 | OUT | power_out | Regulator output, which is stable without any external output capacitor and supplies up to 250 mA of load current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
CAD (KiCad official)
- Symbol:
TPS73250MDBVREP - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps73250mdbvrep-etched.step/tps73250mdbvrep-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps73250mdbvrep.step/tps73250mdbvrep.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
bad03516f0a9f6f4, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS73250MDBVREP
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TPS73250MDBVREP from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Unregulated input supply to the LDO, with an operating range of 1.7 V to 5.5 V and an absolute maximum of -0.3 V to 6 V. |
| 2 | GND | power_in | Ground connection for the regulator; the datasheet recommends separate ground planes for VIN and VOUT, each connected only to the GND pin. |
| 3 | EN | input | Enable pin, active high and TTL-CMOS compatible: driving it above 1.7 V turns the regulator on, and driving it below 0.5 V (maximum) puts it in shutdown; tie to IN if unused, with an absolute maximum of -0.3 V to 6 V. |
| 4 | NR/FB | passive | For the fixed-voltage versions (including TPS73250) this is the NR noise-reduction pin, where an external capacitor to GND filters the internal reference noise; on the adjustable version this same pin is the FB feedback input that sets the output voltage. |
| 5 | OUT | power_out | Regulator output, which is stable without any external output capacitor and supplies up to 250 mA of load current. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## CAD (KiCad official)
- Symbol: `TPS73250MDBVREP`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `tps73250mdbvrep-etched.step` / `tps73250mdbvrep-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps73250mdbvrep.step` / `tps73250mdbvrep.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps73230-ep) (25 pp, sha256 `bad03516f0a9f6f4`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps73250mdbvrep-datasheet.pdf)