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TPS73201DBVR

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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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docs tps73201dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json tps73201dbvr: specified limits as data (metadata.characteristics, 36 rows from the datasheet) · Ray
README.md tps73201dbvr: specified limits as data (metadata.characteristics, 36 rows from the datasheet) · Ray
tps73201dbvr-etched.fit.json tps73201dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tps73201dbvr-etched.glb tps73201dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tps73201dbvr-etched.step tps73201dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tps73201dbvr.glb Publish 0.1.0 · Ray
tps73201dbvr.kicad_mod Publish 0.1.0 · Ray
tps73201dbvr.kicad_sym Publish 0.1.0 · Ray
tps73201dbvr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tps73201dbvr.step Publish 0.1.0 · Ray

TPS73201DBVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS73201DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Unregulated input supply, 1.7V to 5.5V (absolute max 6.0V). Bypassing is not required for stability but a small input capacitor is recommended for transient performance.
2 GND power_in Device ground reference. Ground pin current is typically 400µA at 10mA load and 650µA at 250mA load.
3 EN input Enable input (active high). VEN >= 1.7V enables regulator, VEN <= 0.5V puts the device in shutdown (IQ < 1µA). Do not leave floating. Absolute max 6.0V.
4 NR/FB input On the adjustable TPS73201, this pin is FB (feedback) - connect to the midpoint of an external resistor divider from OUT to GND to set VOUT = (R1+R2)/R2 × 1.204V. For fixed 1.20V operation, tie FB to OUT. VFB reference is 1.20V typical (1.198-1.210V).
5 OUT power_out Regulated output, 1.20V to 5.5V (adjustable). 250mA rated output current with 40mV typical dropout. Stable with or without an output capacitor of any value/type; 0.1µF typical improves noise/transient performance. Current limit 425mA typical.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • TPS73201DBVR
  • TPS73201DBVRDBVT
  • TPS73201DBVRDRBR
  • TPS73201DBVRDRBT
  • TPS73201DBVRDCQR
  • TPS73201DBVRDCQT

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN input voltage range (absolute maximum) VIN -0.3 6 V 2
VEN range (absolute maximum) VEN -0.3 6 V 2
VOUT range (absolute maximum) VOUT -0.3 5.5 V 2
VNR, VFB range (absolute maximum) VNR, VFB -0.3 6 V 2
Junction temperature range (absolute maximum) TJ -55 150 °C 2
Storage temperature range -65 150 °C 2
ESD rating, HBM 2 kV HBM 2
ESD rating, CDM 500 V CDM 2
Operating junction temperature TJ -40 125 °C 4
Input voltage range VIN 1.7 5.5 V 4
EN pin high (enabled) VEN(HI) 1.7 V 4
EN pin low (shutdown) VEN(LO) 0 0.5 V 4
Internal reference (TPS73201) VFB 1.198 1.2 1.21 V TJ = +25°C 4
VOUT accuracy (nominal) VOUT -0.5 0.5 % TJ = +25°C; VOUT + 0.5V ≤ VIN ≤ 5.5V 4
VOUT accuracy (over line, load, temperature) VOUT -1 1 % VOUT + 0.5V ≤ VIN ≤ 5.5V; 10 mA ≤ IOUT ≤ 250mA; over TJ range 4
EN pin current (enabled) IEN(HI) 0.02 0.1 mA VEN = 5.5V 4
Reverse leakage current (-IIN) IREV 0.1 10 mA VEN ≤ 0.5V, 0V ≤ VIN ≤ VOUT 4
GND pin current IGND 400 550 mA IOUT = 10mA (IQ) 4
GND pin current IGND 650 950 mA IOUT = 250mA 4
Shutdown current (IGND) ISHDN 0.02 1 µA VEN ≤ 0.5V, VOUT ≤ VIN ≤ 5.5V, –40°C ≤ TJ ≤ +100°C 4
FB pin current (TPS73201) IFB 0.1 0.3 mA 4
Output current limit ICL 250 425 600 mA VOUT = 0.9 × VOUT(nom) 4
Dropout voltage VDO 40 150 mV IOUT = 250mA (VIN = VOUT(nom) – 0.1V) 4
Output impedance in dropout ZO(DO) 0.25 Ω 1.7 V ≤ VIN ≤ VOUT + VDO 4
Short-circuit current ISC 300 mA VOUT = 0V 4
Line regulation ΔVOUT%/ΔVIN 0.01 %/V VOUT(nom) + 0.5V ≤ VIN ≤ 5.5V 4
Load regulation ΔVOUT%/ΔIOUT 0.002 %/mA 1mA ≤ IOUT ≤ 250mA 4
Load regulation ΔVOUT%/ΔIOUT 0.0005 %/mA 10mA ≤ IOUT ≤ 250mA 4
Power-supply rejection ratio (ripple rejection) PSRR 58 dB f = 100Hz, IOUT = 250 mA 4
Power-supply rejection ratio (ripple rejection) PSRR 37 dB f = 10kHz, IOUT = 250 mA 4
Startup time tSTR 600 ms VOUT = 3V, RL = 30Ω; COUT = 1 mF, CNR = 0.01 mF 4
Shutdown (thermal) temperature, increasing TSD 160 °C Temperature increasing 4
Reset (thermal) temperature, decreasing TSD 140 °C Temperature decreasing 4
Junction-to-ambient thermal resistance (DBV) θJA 180 °C/W DBV (SOT-23, 5 pins) 3
Junction-to-case (top) thermal resistance (DBV) θJCtop 64 °C/W DBV (SOT-23, 5 pins) 3
Junction-to-board thermal resistance (DBV) θJB 35 °C/W DBV (SOT-23, 5 pins) 3

CAD (KiCad official)

  • Symbol: TPS73201DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps73201dbvr-etched.step / tps73201dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps73201dbvr.step / tps73201dbvr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tps73201dbvr.step 85 KB You want the bare part, or you mark your own boards.
tps73201dbvr-etched.step 2.2 MB You want the part with TPS73201DBVR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 543 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 e4b27397d5573fa6, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF