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TPS73115MDBVREP
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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tps73115mdbvrep: specified limits as data (metadata.characteristics, 22 rows from the datasheet)
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TPS73115MDBVREP
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TPS73115MDBVREP from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Unregulated input supply; the datasheet gives an input voltage range of 1.7 V to 5.5 V. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | EN | input | Driving EN high turns on the regulator and driving it low puts the regulator into shutdown mode; EN can be connected to IN if not used. |
| 4 | NR | passive | On fixed-voltage versions only, an external capacitor connected to this pin bypasses noise generated by the internal bandgap, reducing output noise to very low levels. |
| 5 | OUT | power_out | Regulator output; the datasheet states there are no output capacitor requirements for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range | VIN | 1.7 | 5.5 | V | 4 | ||
| Output voltage accuracy (nominal) | VOUT | -0.5 | 0.5 | % | TA = 25°C | 4 | |
| Output voltage accuracy over line, load and temperature | VOUT | -1 | 1 | % | VOUT + 0.5 V ≤ VIN ≤ 5.5 V, 10 mA ≤ IOUT ≤ 150 mA | 4 | |
| Output current limit | ICL | 150 | 360 | 500 | mA | VOUT = 0.9 × VOUT(nom) | 4 |
| Reverse leakage current | IREV | 0.1 | 15 | μA | VEN ≤ 0.5 V, 0 V ≤ VIN ≤ VOUT | 4 | |
| Ground pin current | IGND | 400 | 550 | μA | IOUT = 10 mA | 4 | |
| Ground pin current | IGND | 550 | 750 | μA | IOUT = 150 mA | 4 | |
| Shutdown current (IGND) | ISHDN | 0.02 | 1 | μA | VEN ≤ 0.5 V, VOUT ≤ VIN ≤ 5.5 V | 4 | |
| Enable high (enabled) voltage | VEN(HI) | 1.7 | V | 4 | |||
| Enable low (shutdown) voltage | VEN(LO) | 0 | 0.5 | V | 4 | ||
| Enable pin current (enabled) | IEN(HI) | 0.02 | 0.1 | μA | VEN = 5.5 V | 4 | |
| Operating ambient temperature | TA | -55 | 125 | °C | 4 | ||
| Input voltage (absolute maximum) | VIN | -0.3 | 6 | V | 3 | ||
| Enable voltage (absolute maximum) | VEN | -0.3 | 6 | V | 3 | ||
| Output voltage (absolute maximum) | VOUT | -0.3 | 5.5 | V | 3 | ||
| Ambient temperature range (absolute maximum) | TA | -55 | 150 | °C | 3 | ||
| Storage temperature range | -65 | 150 | °C | 3 | |||
| ESD rating, HBM | 2 | kV | Human body model | 3 | |||
| ESD rating, CDM | 500 | V | Charged device model | 3 | |||
| Junction-to-ambient thermal resistance (low-K board) | RθJA | 255 | °C/W | JEDEC Low-K (1s) board | 3 | ||
| Junction-to-ambient thermal resistance (high-K board) | RθJA | 180 | °C/W | JEDEC High-K (2s2p) board | 3 | ||
| Junction-to-case thermal resistance | RθJC | 64 | °C/W | 3 |
CAD (KiCad official)
- Symbol:
TPS73115MDBVREP - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps73115mdbvrep-etched.step/tps73115mdbvrep-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps73115mdbvrep.step/tps73115mdbvrep.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (23 pp, sha256
095d3e44c142baf2, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS73115MDBVREP
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TPS73115MDBVREP from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Unregulated input supply; the datasheet gives an input voltage range of 1.7 V to 5.5 V. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | EN | input | Driving EN high turns on the regulator and driving it low puts the regulator into shutdown mode; EN can be connected to IN if not used. |
| 4 | NR | passive | On fixed-voltage versions only, an external capacitor connected to this pin bypasses noise generated by the internal bandgap, reducing output noise to very low levels. |
| 5 | OUT | power_out | Regulator output; the datasheet states there are no output capacitor requirements for stability. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range | VIN | 1.7 | | 5.5 | V | | 4 |
| Output voltage accuracy (nominal) | VOUT | -0.5 | | 0.5 | % | TA = 25°C | 4 |
| Output voltage accuracy over line, load and temperature | VOUT | -1 | | 1 | % | VOUT + 0.5 V ≤ VIN ≤ 5.5 V, 10 mA ≤ IOUT ≤ 150 mA | 4 |
| Output current limit | ICL | 150 | 360 | 500 | mA | VOUT = 0.9 × VOUT(nom) | 4 |
| Reverse leakage current | IREV | | 0.1 | 15 | μA | VEN ≤ 0.5 V, 0 V ≤ VIN ≤ VOUT | 4 |
| Ground pin current | IGND | | 400 | 550 | μA | IOUT = 10 mA | 4 |
| Ground pin current | IGND | | 550 | 750 | μA | IOUT = 150 mA | 4 |
| Shutdown current (IGND) | ISHDN | | 0.02 | 1 | μA | VEN ≤ 0.5 V, VOUT ≤ VIN ≤ 5.5 V | 4 |
| Enable high (enabled) voltage | VEN(HI) | 1.7 | | | V | | 4 |
| Enable low (shutdown) voltage | VEN(LO) | 0 | | 0.5 | V | | 4 |
| Enable pin current (enabled) | IEN(HI) | | 0.02 | 0.1 | μA | VEN = 5.5 V | 4 |
| Operating ambient temperature | TA | -55 | | 125 | °C | | 4 |
| Input voltage (absolute maximum) | VIN | -0.3 | | 6 | V | | 3 |
| Enable voltage (absolute maximum) | VEN | -0.3 | | 6 | V | | 3 |
| Output voltage (absolute maximum) | VOUT | -0.3 | | 5.5 | V | | 3 |
| Ambient temperature range (absolute maximum) | TA | -55 | | 150 | °C | | 3 |
| Storage temperature range | | -65 | | 150 | °C | | 3 |
| ESD rating, HBM | | | | 2 | kV | Human body model | 3 |
| ESD rating, CDM | | | | 500 | V | Charged device model | 3 |
| Junction-to-ambient thermal resistance (low-K board) | RθJA | | 255 | | °C/W | JEDEC Low-K (1s) board | 3 |
| Junction-to-ambient thermal resistance (high-K board) | RθJA | | 180 | | °C/W | JEDEC High-K (2s2p) board | 3 |
| Junction-to-case thermal resistance | RθJC | | 64 | | °C/W | | 3 |
## CAD (KiCad official)
- Symbol: `TPS73115MDBVREP`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `tps73115mdbvrep-etched.step` / `tps73115mdbvrep-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps73115mdbvrep.step` / `tps73115mdbvrep.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps73130-ep) (23 pp, sha256 `095d3e44c142baf2`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps73115mdbvrep-datasheet.pdf)