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TPS73033DBVRG4

Public Made by Adom

by adom

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps73033dbvrg4factory-2.0.0extractor-text
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TPS73033DBVRG4

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS73033DBVRG4 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Device input; the datasheet specifies a recommended VIN of 2.7 V to 5.5 V, and a ceramic bypass capacitor of at least 0.1 µF (old chip) or 1 µF (new chip) must be placed close to the device between IN and GND.
2 GND power_in Regulator ground; the datasheet recommends connecting the input and output capacitor grounds directly to this pin.
3 EN input Enable pin, active high: driving it above VEN(HI) turns the regulator on and driving it below VEN(LOW) puts it in shutdown (for the old chip, VEN(HI) minimum is 1.7 V and VEN(LOW) maximum is 0.7 V at 2.7 V ≤ VIN ≤ 5.5 V); tie to IN if shutdown is not used and do not leave it floating.
4 NC/NR passive On the old chip this is the noise-reduction pin (NR), connected through an internal 250 kΩ resistor to the voltage reference, where an external bypass capacitor of up to 0.1 µF filters reference noise; on the new chip it is a no-connect pin that may be left floating or tied to GND for thermal performance.
5 OUT output Regulator output, which delivers up to 200 mA (IOUT 0 to 200 mA) and requires a minimum 2.2 µF ceramic output capacitor from OUT to GND for stability.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: TPS73033DBVRG4
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps73033dbvrg4-etched.step / tps73033dbvrg4-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps73033dbvrg4.step / tps73033dbvrg4.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 14439297a4ab9a2b, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF