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TPS72733DSER

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6(1.5x1.5)

TPS72733DSER from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Regulated output voltage pin. A small 1-μF ceramic capacitor is needed from this pin to ground to assure stability.
2 NC unconnected No connection. This pin can be tied to ground to improve thermal dissipation.
3 GND power_in Ground pin.
4 EN input Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator into shutdown mode, thus reducing the operating current to 120 nA, nominal.
5 NC unconnected No connection. This pin can be tied to ground to improve thermal dissipation.
6 IN input Input pin. A small capacitor is needed from this pin to ground to assure stability. See Input and Output Capacitor Requirements in the Application Information section for more details.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6(1.5x1.5)
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Initial output accuracy at TJ=+25°C -2.5 2.5 mV TJ = +25°C 6
DC output accuracy -2 2 % VOUT + 0.3 V ≤ VIN ≤ 5.5 V, 0 mA ≤ IOUT ≤ 200 mA 6
DC output accuracy -1 1 % VOUT + 0.3 V ≤ VIN ≤ 5.5 V, 0 mA ≤ IOUT ≤ 250 mA 6
Load transient deviation ΔVOUT -50 50 mV 1 mA to 200 mA or 200 mA to 1 mA in 1 μs, COUT = 1 μF 6
Load transient deviation ΔVOUT -65 65 mV 1 mA to 250 mA or 250 mA to 1 mA in 1 μs, COUT = 1 μF 6
Dropout voltage VDO 130 200 mV VIN = 0.98 × VOUT(NOM), IOUT = 200 mA 6
Output current limit ICL 300 400 550 mA VOUT = 0.9 × VOUT(NOM) 6
Ground pin current IGND 7.9 12 µA IOUT = 0 mA, TJ = -40°C to +125°C 6
Shutdown current (IGND) ISHDN 0.55 2 µA EN ≤ 0.4 V, 2.0 V < VIN ≤ 4.5 V, TJ = -40°C to +85°C 6
Enable pin high (enabled) VHI 0.9 V 6
Enable pin low (disabled) VLO 0.4 V 6
Enable pin current IEN 40 500 nA EN = 5.5 V 6
Undervoltage lock-out UVLO 1.85 1.9 1.95 V VIN rising 6
Operating junction temperature range (electrical) TJ -40 125 °C 6
Input voltage VIN 2 5.5 V 5
Output current IOUT 0 250 mA 5
Operating junction temperature range TJ -40 125 °C 5
Input voltage range VIN -0.3 6 V with respect to GND 5
Enable voltage range VEN -0.3 6 V VEN absolute maximum is VIN or 6.0 V, whichever is less 5
Output voltage range VOUT -0.3 6 V with respect to GND 5
Operating junction temperature TJ -55 150 °C 5
Storage temperature Tstg -55 150 °C 5
Junction-to-ambient thermal resistance RθJA 190.5 °C/W DSE (WSON) 6 pins, JEDEC board 5
Junction-to-case (top) thermal resistance RθJC(top) 94.9 °C/W DSE (WSON) 6 pins 5
Junction-to-board thermal resistance RθJB 149.3 °C/W DSE (WSON) 6 pins 5
Junction-to-top characterization parameter ψJT 6.4 °C/W DSE (WSON) 6 pins 5
Junction-to-board characterization parameter ψJB 152.8 °C/W DSE (WSON) 6 pins 5

CAD (KiCad official)

  • Symbol: TPS72733DSER
  • Footprint: Package_SON:WSON-6_1.5x1.5mm_P0.5mm
  • 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)
  • 3D model files: tps72733dser-etched.step / tps72733dser-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps72733dser.step / tps72733dser.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 eb07c4ca05ae7371, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF