component
TPS72301DRVR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 20d ago |
| viewers | 20d ago |
| package.json | 20d ago |
| page.json | 16d ago |
| README.md | 16d ago |
| tps72301drvr-etched.glb | 20d ago |
| tps72301drvr-etched.step | 20d ago |
| tps72301drvr-hero.glb | 20d ago |
| tps72301drvr-hero.overlay.json | 20d ago |
| tps72301drvr.glb | 20d ago |
| tps72301drvr.kicad_mod | 20d ago |
| tps72301drvr.kicad_sym | 20d ago |
| tps72301drvr.lbr | 20d ago |
| tps72301drvr.step | 20d ago |
TPS72301DRVR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)
TPS72301DRVR from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulator output; a capacitor from OUT to GND is required for stability, using the recommended nominal value or larger ceramic for good transient response, placed as close to the output pin as possible. |
| 2 | NR/FB | input | For the adjustable TPS72301 this pin is the feedback input, which must be connected to the output through a resistor divider to set the output voltage (the NR noise-bypass function applies only to fixed-voltage versions). |
| 3 | N/C | unconnected | No internal connection; leave floating or connect to any potential, and grounding it improves thermal performance. |
| 4 | EN | input | Bipolar enable: drive above the positive enable threshold (at least +1.5 V) or below the negative enable threshold (at most -1.5 V) to turn the regulator on, and below +0.4 V and above -0.4 V to put it in shutdown; the pin has a weak internal pulldown so leaving it floating enables the device. |
| 5 | GND | power_in | Ground pin. |
| 6 | IN | power_in | Input supply pin; the device operates from -2.7 V to -10 V input (absolute maximum -11 V), with input capacitance per the recommended operating conditions. |
| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Feedback reference voltage (TPS72301), old chip | VFB | -1.21 | -1.186 | -1.162 | V | TJ = 25°C | 5 |
| Output voltage accuracy (adjustable output), old chip | -3 | 1 | 3 | % | 5 | ||
| Output voltage accuracy, old chip | -1 | 1 | % | TJ = 25°C | 5 | ||
| Dropout voltage, old chip | VDO | 280 | 500 | mV | IO = 200mA, VO = 0.96 × VO(NOM) | 5 | |
| Output current limit, old chip | ILIM | 300 | 550 | 800 | mA | VO = 0.85 × VO(NOM) | 5 |
| Ground pin current, old chip | IGND | 130 | 200 | µA | IO = 0mA (IQ), –10V ≤ VI ≤ VO – 0.5V | 6 | |
| Ground pin current, old chip | IGND | 350 | 500 | µA | IO = 200mA, –10V ≤ VI ≤ VO – 0.5V | 6 | |
| Shutdown ground pin current, old chip | ISHDN | 0.1 | 2 | µA | –0.4V ≤ VEN ≤ 0.4V, –10V ≤ VI ≤ VO – 0.5V | 6 | |
| Feedback pin current, old chip | IFB | 0.05 | 1 | µA | –10V ≤ VI ≤ VO – 0.5V | 6 | |
| EN pin current, old chip | IEN | 0.1 | 2 | –10V ≤ VI ≤ VO – 0.5V, –10V ≤ VEN ≤ ±3.5V | 6 | ||
| Input supply voltage range (absolute maximum) | IN | -11 | 0.3 | V | 4 | ||
| Enable voltage range (absolute maximum) | EN | 5.5 | V | 4 | |||
| Output voltage range (absolute maximum) | OUT | -11 | 0.3 | V | 4 | ||
| NR voltage range, old chip (absolute maximum) | NR | -11 | 5.5 | V | 4 | ||
| Operating junction temperature (absolute maximum) | TJ | -65 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Input supply voltage range (recommended) | VIN | -10 | -2.7 | V | 4 | ||
| Output voltage range (recommended) | VOUT | -10 | -1.186 | V | 4 | ||
| Enable voltage range (recommended) | VEN | -10 | 5 | V | 4 | ||
| Output current (recommended) | IOUT | 0 | 200 | mA | 4 | ||
| Input capacitor, old chip (recommended) | CIN | 0.1 | 2.2 | µF | 4 | ||
| Output capacitor (recommended) | COUT | 2.2 | 100 | µF | 4 | ||
| Operating junction temperature (recommended) | TJ | -40 | 125 | °C | 4 | ||
| Junction-to-ambient thermal resistance, DRV (WSON), old chip | RθJA | 85.6 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance, DRV (WSON), old chip | RθJC(top) | 83.7 | °C/W | 5 | |||
| Junction-to-board thermal resistance, DRV (WSON), old chip | RθJB | 47.3 | °C/W | 5 | |||
| Junction-to-top characterization parameter, DRV (WSON), old chip | ΨJT | 3.7 | °C/W | 5 | |||
| Junction-to-board characterization parameter, DRV (WSON), old chip | ΨJB | 47.3 | °C/W | 5 | |||
| Junction-to-case (bottom) thermal resistance, DRV (WSON), old chip | RθJC(bot) | 31.6 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
TPS72301DRVR - Footprint:
Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm - 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
tps72301drvr-etched.step/tps72301drvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps72301drvr.step/tps72301drvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (48 pp, sha256
6de560fcd9fe8465, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).