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TPS72301DBVR

Public Made by Adom

by adom

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs tps72301dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers tps72301dbvr: viewers · Ray 1mo ago
package.json tps72301dbvr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
page.json tps72301dbvr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md Initial commit: component/tps72301dbvr · Ray 1mo ago
tps72301dbvr-etched.fit.json tps72301dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tps72301dbvr-etched.glb tps72301dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tps72301dbvr-etched.step tps72301dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tps72301dbvr.glb Publish 0.1.0 · Ray 1mo ago
tps72301dbvr.kicad_mod Publish 0.1.0 · Ray 1mo ago
tps72301dbvr.kicad_sym Publish 0.1.0 · Ray 1mo ago
tps72301dbvr.lbr Publish 0.1.0 · Ray 1mo ago
tps72301dbvr.step Publish 0.1.0 · Ray 1mo ago

TPS72301DBVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS72301DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin; provides negative rail return path for the regulator.
2 IN power_in Negative input power supply pin; accepts -10V to -2.7V input voltage range per section 5.3.
3 EN input Dual-polarity enable pin; regulator enabled when VEN ≥ +1.5V or VEN ≤ -1.5V, disabled when -0.4V ≤ VEN ≤ +0.4V per section 5.5; weak internal pull-down on new chip.
4 FB input Feedback voltage input pin for adjustable output configuration; must be connected to output through external resistor divider network for device to function properly.
5 OUT output Regulated negative voltage output; requires 2.2µF to 100µF ceramic capacitor to ground with 0.5Ω maximum ESR for stability per section 5.3.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: TPS72301DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps72301dbvr-etched.step / tps72301dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps72301dbvr.step / tps72301dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (48 pp, sha256 6de560fcd9fe8465, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF