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TPS72215DBVT

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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps72215dbvtfactory-2.0.0extractor-text

Verified TPS72215DBVT

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier mfr, 5 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TPS72215DBVT · SOT-23-5 · 5 pins
  • ✓copper: 5 copper pads, none touching another net
  • ✓datasheet: all 5 pin names found in the 17-page datasheet
  • ✓distributor: lcsc C2860163, digikey 296-12521-2-ND, mouser 595-TPS72215DBVT
  • ✓family: SOT-23-5
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-795xu8i6/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 5 pins = 5 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 5 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tps72215dbvt.kicad_sym✓ tps72215dbvt.kicad_mod✓ tps72215dbvt.step
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Contents

README

markdown

TPS72215DBVT

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS72215DBVT from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input supply voltage with a recommended range of 1.8 V to 5.5 V and an absolute maximum range of -0.3 V to 7 V.
2 GND power_in Ground terminal; the typical quiescent (ground pin) current is 85 µA during normal operation and 1 µA in shutdown.
3 EN input Enable input; a logic low below 0.4 V shuts off the output, a high level of at least 1.4 V enables it, and the absolute maximum is -0.3 V to 7 V.
4 NC/FB unconnected Not connected on the fixed-output TPS72215 and must be left floating, not tied to GND; it serves as the feedback input FB only on the adjustable TPS72201.
5 OUT power_out Regulated output voltage with a continuous output current of 0 to 50 mA, and output current internally limited to approximately 350 mA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage VI 1.8 5.5 V 3
Continuous output current IO 0 50 mA 3
Operating junction temperature TJ -40 125 °C 3
Output voltage VO 1.455 1.545 V 0 µA < IO < 50 mA, 2.5 V ≤ VI ≤ 5.5 V 3
Current limit 175 525 mA See Note 2 3
Quiescent current (GND terminal current) IQ 85 120 µA TJ = 25°C 3
Quiescent current (GND terminal current) IQ 275 550 µA IO = 50 mA, TJ = 25°C 3
Standby current 0.01 1 µA EN < 0.5 V 3
EN high level input VIH 1.4 V 3
EN low level input VIL -0.2 0.4 V 3
Output voltage line regulation (ΔVO/VO) 0.03 0.09 %/V TJ = 25°C 3
Output voltage line regulation (ΔVO/VO) 0.1 %/V VO + 1 V < VI ≤ 5.5 V 3
EN input current II -0.01 µA EN = 0 V 3
Thermal shutdown temperature 170 °C 3
Thermal shutdown hysteresis 20 °C 3
Input voltage range VI -0.3 7 V 2
Voltage range at EN VEN -0.3 7 V 2
Operating virtual junction temperature range TJ -40 150 °C 2
Storage temperature range Tstg -65 150 °C 2
ESD rating, HBM 3 kV HBM 2
Thermal resistance junction-to-ambient (Low K board) RθJA 259 °C/W JEDEC Low K (1s) board, DBV package 2
Thermal resistance junction-to-ambient (High K board) RθJA 180 °C/W JEDEC High K (2s2p) board, DBV package 2
Thermal resistance junction-to-case RθJC 65.8 °C/W DBV package 2
Output noise voltage Vn 90 µV BW = 200 Hz to 100 kHz, TJ = 25°C, Co = 1 µF 3
Ripple rejection PSRR 48 dB f = 100 Hz, Co = 10 µF, IO = 50 mA, TJ = 25°C 3

CAD (KiCad official)

  • Symbol: TPS72215DBVT
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps72215dbvt-etched.step / tps72215dbvt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps72215dbvt.step / tps72215dbvt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (17 pp, sha256 a240068d1aebdf7e, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF