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TPS72118MDBVREP

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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS72118MDBVREP

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS72118MDBVREP from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input supply voltage; the device operates from 1.8 V to 5.5 V, with minimum IN operating voltage of 1.8 V or VOUT + VDO, whichever is greater.
2 GND power_in Ground pin, which carries the quiescent (ground) current of the regulator.
3 EN input Enable input; a logic low (below 0.4 V) shuts off the output and reduces supply current below 3 µA, and a logic high of 1.4 V or more enables the regulator.
4 NC/FB unconnected Not connected in the fixed-voltage TPS72118 and must be left floating and not connected to GND; it is the feedback input (FB) only on the adjustable TPS72101 option.
5 OUT power_out Regulated output voltage of 1.8 V; the device limits output current internally to approximately 350 mA, with the voltage on OUT rated from -0.3 V to VIN + 0.3 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage VIN 1.8 5.5 V 3
Continuous output current IOUT 0 150 mA 3
Operating junction temperature TJ -55 125 °C 3
Output voltage (1.8 V fixed version) VOUT 1.728 1.872 V 2.8 V ≤ VIN ≤ 5.5 V, 1 mA < IOUT < 150 mA, TJ = full temp 3
Quiescent current (GND current) IQ 125 µA IOUT = 1 mA, TJ = full temp 3
Quiescent current (GND current) IQ 850 µA IOUT = 150 mA, TJ = full temp 3
Standby current 3 µA EN < 0.5 V, TJ = full temp 3
Current limit 120 525 mA VO = 1 V, pulse duration = 10 ms 3
Output voltage line regulation (ΔVOUT/VOUT) 0.03 0.2 %/V VO + 1 V < VIN ≤ 5.5 V, TJ = 25°C 3
Output voltage line regulation (ΔVOUT/VOUT) 0.35 %/V VO + 1 V < VIN ≤ 5.5 V, IOUT = 150 mA, TJ = full temp 3
EN high level input VIH 1.4 V 3
EN low level input VIL 0.4 V 3
EN input current IEN 0 1 µA EN = 0 V 3
Input voltage (absolute maximum, voltage range at IN) VIN -0.3 7 V Voltage range at IN, with respect to network ground 2
Voltage range at EN VEN -0.3 7 V Voltage range at EN, with respect to network ground 2
Voltage on OUT, FB, NC VOUT, FB, NC -0.3 V Maximum printed as VI + 0.3 V (not numeric) 2
Operating junction temperature range (absolute maximum) TJ -55 150 °C 2
Storage temperature range Tstg -65 150 °C 2
Thermal resistance junction-to-case RθJC 65.8 °C/W DBV package 2
Thermal resistance junction-to-ambient RθJA 259 °C/W JEDEC Low-K (1s) board 2
Thermal resistance junction-to-ambient RθJA 180 °C/W JEDEC High-K (2s2p) board 2

CAD (KiCad official)

  • Symbol: TPS72118MDBVREP
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps72118mdbvrep-etched.step / tps72118mdbvrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps72118mdbvrep.step / tps72118mdbvrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (15 pp, sha256 860681fd9f717aeb, retrieved 2026-10-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF