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TPS72118DBVR

Texas Instruments · Linear Voltage Regulators (LDO) · SOT-23-5

TPS72118DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input supply voltage pin; the datasheet's VIN range is 1.8 V to 5.5 V and the input must be at least VOUT + VDO.
2 GND power_in Ground pin, the network ground reference for all voltages on the device.
3 EN input Enable input; a logic low (below 0.4 V VIL) shuts off the output and EN may be tied to IN when shutdown is not used.
4 NC/FB unconnected Not connected on the fixed-output TPS72118 and must be left floating and not connected to GND; it is the feedback input only on the adjustable TPS72101.
5 OUT power_out Regulated output voltage pin, rated for 150 mA continuous output current (IOUT 0 to 150 mA).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management ICs
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage VIN 1.8 5.5 V 3
Output current, continuous IOUT 0 150 mA 3
Operating junction temperature TJ -40 125 °C 3
Output voltage (TPS72118, 1.8 V) VOUT 1.746 1.854 V 0 µA < IOUT < 150 mA, 2.8 V ≤ VIN ≤ 5.5 V 3
Output voltage (TPS72118, 1.8 V) at TJ = 25°C VOUT 1.8 V TJ = 25°C 3
Current limit 175 525 mA See (2): output voltage VO = 1 V, pulse duration = 10 ms 3
Quiescent current (GND current) IQ 85 120 µA TJ = 25°C 3
Quiescent current (GND current) at IOUT = 150 mA, TJ = 25°C IQ 570 µA IOUT = 150 mA, TJ = 25°C 3
Quiescent current (GND current) at IOUT = 150 mA IQ 850 µA IOUT = 150 mA 3
Standby current 0.01 µA EN < 0.5 V, TJ = 25°C 3
Standby current 1 µA EN < 0.5 V 3
Output voltage line regulation (ΔVOUT/VOUT) 0.03 0.09 %/V TJ = 25°C, VO + 1 V < VIN ≤ 2.5 V 3
Output voltage load regulation (TPS72118) 0.5 mV 0 < IOUT < 150 mA, TJ = 25°C 3
EN high level input VIH 1.4 V 3
EN low level input VIL -0.2 0.4 V 3
EN input current IEN -0.01 µA EN = 0 V 3
Dropout voltage (TPS72118) VDO 150 mV IOUT = 150 mA, TJ = 25°C 3
Thermal shutdown temperature 170 °C 3
Thermal shutdown hysteresis 20 °C 3
Voltage range at IN VIN -0.3 7 V 2
Voltage range at EN VEN -0.3 7 V 2
Voltage on OUT, FB, NC VOUT -0.3 V VI + 0.3 V (upper limit) 2
Operating junction temperature range TJ -40 150 °C 2
Storage temperature range Tstg -65 150 °C 2
Junction-to-case thermal resistance RθJC 65.8 °C/W DBV package 2
Junction-to-ambient thermal resistance (Low-K) RθJA 259 °C/W Low-K JEDEC board (1s), DBV package 2
Junction-to-ambient thermal resistance (High-K) RθJA 180 °C/W High-K JEDEC board (2s2p), DBV package 2

CAD (KiCad official)

  • Symbol: TPS72118DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps72118dbvr-etched.step / tps72118dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps72118dbvr.step / tps72118dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (17 pp, sha256 93210a8dbf5c5ed0, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF