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TPS72033QDRVRQ1
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# TPS72033QDRVRQ1++**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)++TPS72033QDRVRQ1 from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OUT | output | Output pin; a 2.2-µF ceramic capacitor must be connected from this pin to ground for stability and to provide load transients. |+| 2 | NC | unconnected | No connection. |+| 3 | EN | input | Enable pin; a logic high signal turns the device on and regulates the voltage from IN to OUT, and a logic low turns the device off. Enable voltage is rated 0 V to 5.5 V under recommended operating conditions. |+| 4 | BIAS | input | Bias supply pin; TI recommends bypassing it with a ceramic capacitor to ground for better transient performance (CBIAS 0.1 µF nominal in recommended conditions), and VBIAS must be 2.6 V or VOUT + 1.4 V, whichever applies, up to 5.5 V. |+| 5 | GND | power_in | Ground pin. |+| 6 | IN | input | Input pin; maximum 4.5 V and VIN must not exceed VBIAS under all conditions, and it should be bypassed to ground with a ceramic capacitor. |+| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WSON-6-EP(2x2) |+| Category | Power Management (PMIC) |+| Pins | 7 |++## CAD (KiCad official)++- Symbol: `TPS72033QDRVRQ1`+- Footprint: `Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm`+- 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)+- 3D model files: `tps72033qdrvrq1-etched.step` / `tps72033qdrvrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps72033qdrvrq1.step` / `tps72033qdrvrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps720-q1) (26 pp, sha256 `1f171499f63bd1ce`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps72033qdrvrq1-datasheet.pdf)
page.jsonadded+195@@ -0,0 +1,195 @@+{+ "slug": "tps72033qdrvrq1",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps72033qdrvrq1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps72033qdrvrq1.kicad_sym",+ "tps72033qdrvrq1.kicad_mod",+ "tps72033qdrvrq1.glb",+ "tps72033qdrvrq1.step",+ "tps72033qdrvrq1.lbr",+ "docs/hero.png",+ "docs/tps72033qdrvrq1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps72033qdrvrq1-hero.glb",+ "tps72033qdrvrq1-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS72033QDRVRQ1",+ "manufacturer": "Texas Instruments",+ "package": "WSON-6-EP(2x2)",+ "pin_count": 7,+ "category": "Power Management (PMIC)",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps720-q1",+ "parts": {+ "symbol": "tps72033qdrvrq1.kicad_sym",+ "footprint": "tps72033qdrvrq1.kicad_mod",+ "model_3d": "tps72033qdrvrq1-hero.glb",+ "model_3d_plain": "tps72033qdrvrq1.glb",+ "model_3d_step": "tps72033qdrvrq1-etched.step",+ "model_3d_step_plain": "tps72033qdrvrq1.step",+ "lbr": "tps72033qdrvrq1.lbr"+ },+ "distributor_links": {+ "lcsc": "C2865103",+ "digikey": "296-45276-2-ND",+ "mouser": "595-TPS72033QDRVRQ1"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T16:34:22Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-45276-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS72033QDRVRQ1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "OUT",+ "type": "output",+ "description": "Output pin; a 2.2-µF ceramic capacitor must be connected from this pin to ground for stability and to provide load transients."+ },+ {+ "number": "2",+ "name": "NC",+ "type": "unconnected",+ "description": "No connection."+ },+ {+ "number": "3",+ "name": "EN",+ "type": "input",+ "description": "Enable pin; a logic high signal turns the device on and regulates the voltage from IN to OUT, and a logic low turns the device off. Enable voltage is rated 0 V to 5.5 V under recommended operating conditions."+ },+ {+ "number": "4",+ "name": "BIAS",+ "type": "input",+ "description": "Bias supply pin; TI recommends bypassing it with a ceramic capacitor to ground for better transient performance (CBIAS 0.1 µF nominal in recommended conditions), and VBIAS must be 2.6 V or VOUT + 1.4 V, whichever applies, up to 5.5 V."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin."+ },+ {+ "number": "6",+ "name": "IN",+ "type": "input",+ "description": "Input pin; maximum 4.5 V and VIN must not exceed VBIAS under all conditions, and it should be bypassed to ground with a ceramic capacitor."+ },+ {+ "number": "7",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The thermal pad on the DRV (WSON) package is shown in the datasheet as 'Thermal Pad(1)' without a pi; The pinout comes from the TPS720-Q1 family datasheet (page 3, DRV 6-pin WSON top view). The text doe",+ "exposed pad 7 added from the footprint"+ ],+ "pages_sent": 9,+ "cost_usd": 0.0624,+ "at": "2026-10-08T16:34:06"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps720-q1",+ "pages": 26,+ "sha256": "1f171499f63bd1ce",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 7,+ "described": 7,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps72033qdrvrq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 2,+ 1.98,+ 0.82+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "a159a524ab16d3406353a16f8c20b59f5679eea26e2d41174628288b5b9da702",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps72033qdrvrq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 2,+ 1.98,+ 0.82+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "6bb9946349d1186687549b1deffc4e4c29afe3505d1ea622ed344a710a7a8aaa",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}