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Initial commit: component/tps72012drvt

Ray ·64554e5d01 ·6h ago
2 files changed +237
README.mdadded+43
@@ -0,0 +1,43 @@+# TPS72012DRVT++**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6(2x2)++TPS72012DRVT from Texas Instruments, in a WSON-6(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OUT | power_out | Regulated output voltage ranging from 0.9 V to 3.6 V with maximum 350 mA load current, requires 2.2-μF ceramic bypass capacitor for stability. |+| 2 | NC | unconnected | No connection; leave unconnected. |+| 3 | EN | input | Logic input enable pin; logic high enables regulation of IN to OUT, logic low disables device output. |+| 4 | BIAS | power_in | Bias supply input; must be 1.4 V minimum above output voltage to 5.5 V maximum, bypass with 0.1-μF ceramic capacitor. |+| 5 | GND | power_in | Ground reference pin connected to negative rail and exposed thermal pad for heat dissipation. |+| 6 | IN | power_in | Main power input ranging from 1.1 V to 4.5 V maximum; must not exceed BIAS voltage; bypass with 1-μF ceramic capacitor. |+| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WSON-6(2x2) |+| Category | Power Management (PMIC) |+| Pins | 7 |++## CAD (KiCad official)++- Symbol: `TPS72012DRVT`+- Footprint: `Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm`+- 3D model: WSON-6(2x2) (KiCad packages3D, STEP)+- 3D model files: `tps72012drvt-etched.step` / `tps72012drvt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps72012drvt.step` / `tps72012drvt.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps720) (39 pp, sha256 `aa52c96cf07d505f`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps72012drvt-datasheet.pdf)
page.jsonadded+194
@@ -0,0 +1,194 @@+{+  "slug": "tps72012drvt",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "tps72012drvt",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps72012drvt.kicad_sym",+    "tps72012drvt.kicad_mod",+    "tps72012drvt.glb",+    "tps72012drvt.step",+    "tps72012drvt.lbr",+    "docs/hero.png",+    "docs/tps72012drvt-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "tps72012drvt-hero.glb",+    "tps72012drvt-hero.overlay.json"+  ],+  "component": {+    "mpn": "TPS72012DRVT",+    "manufacturer": "Texas Instruments",+    "package": "WSON-6(2x2)",+    "pin_count": 7,+    "category": "Power Management (PMIC)",+    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+    "datasheet": "https://www.ti.com/cn/lit/gpn/tps720",+    "parts": {+      "symbol": "tps72012drvt.kicad_sym",+      "footprint": "tps72012drvt.kicad_mod",+      "model_3d": "tps72012drvt-hero.glb",+      "model_3d_plain": "tps72012drvt.glb",+      "model_3d_step": "tps72012drvt-etched.step",+      "model_3d_step_plain": "tps72012drvt.step",+      "lbr": "tps72012drvt.lbr"+    },+    "distributor_links": {+      "lcsc": "C2862478",+      "digikey": "296-25807-2-ND",+      "mouser": "595-TPS72012DRVT"+    },+    "distributor_check": {+      "checked_at": "2026-10-07T08:41:38Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-25807-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-TPS72012DRVT",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "OUT",+        "type": "power_out",+        "description": "Regulated output voltage ranging from 0.9 V to 3.6 V with maximum 350 mA load current, requires 2.2-μF ceramic bypass capacitor for stability."+      },+      {+        "number": "2",+        "name": "NC",+        "type": "unconnected",+        "description": "No connection; leave unconnected."+      },+      {+        "number": "3",+        "name": "EN",+        "type": "input",+        "description": "Logic input enable pin; logic high enables regulation of IN to OUT, logic low disables device output."+      },+      {+        "number": "4",+        "name": "BIAS",+        "type": "power_in",+        "description": "Bias supply input; must be 1.4 V minimum above output voltage to 5.5 V maximum, bypass with 0.1-μF ceramic capacitor."+      },+      {+        "number": "5",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference pin connected to negative rail and exposed thermal pad for heat dissipation."+      },+      {+        "number": "6",+        "name": "IN",+        "type": "power_in",+        "description": "Main power input ranging from 1.1 V to 4.5 V maximum; must not exceed BIAS voltage; bypass with 1-μF ceramic capacitor."+      },+      {+        "number": "7",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "exposed pad 7 added from the footprint"+        ],+        "pages_sent": 10,+        "cost_usd": 0.0979,+        "at": "2026-10-07T08:41:23"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/tps720",+        "pages": 39,+        "sha256": "aa52c96cf07d505f",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 7,+        "described": 7,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "tps72012drvt.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          2,+          1.98,+          0.82+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "a159a524ab16d3406353a16f8c20b59f5679eea26e2d41174628288b5b9da702",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "tps72012drvt-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          2,+          1.98,+          0.82+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "41e79158e038751ee8b14378c2c0f5232f9ec9450c433a8ef9768dfbe8bdc4b3",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file