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TPS72010QDRVRQ1
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS72010QDRVRQ1
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)
TPS72010QDRVRQ1 from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output that supplies 0.9 V to 3.6 V at up to 350 mA peak; connect a 2.2-µF ceramic capacitor from this pin to ground for stability and load transients. |
| 2 | NC | unconnected | No connection. |
| 3 | EN | input | Enable pin: a logic high turns the device on and regulates IN to OUT, a logic low turns it off, with enable voltage rated 0 V to 5.5 V (absolute maximum 6 V). |
| 4 | BIAS | power_in | Bias supply for the LDO control circuitry, which must be at least 2.6 V or VOUT + 1.4 V and no more than 5.5 V; TI recommends a 0.1-µF ceramic bypass capacitor to ground. |
| 5 | GND | power_in | Ground pin; TI recommends connecting the exposed thermal pad to ground as well. |
| 6 | IN | power_in | Input pin rated at a maximum of 4.5 V steady-state (1.1 V minimum), which must not exceed VBIAS; bypass with a ceramic capacitor (1 µF minimum) to ground. |
| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
CAD (KiCad official)
- Symbol:
TPS72010QDRVRQ1 - Footprint:
Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm - 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
tps72010qdrvrq1-etched.step/tps72010qdrvrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps72010qdrvrq1.step/tps72010qdrvrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
1f171499f63bd1ce, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).