component
TPS71733DRVR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS71733DRVR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)
TPS71733DRVR from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | The regulated output voltage pin; a minimum capacitance of 1 μF is required for stability from this pin to ground. |
| 2 | NR/FB | passive | On the fixed-voltage version (TPS71733) this pin is the noise reduction (NR) pin, where a noise reduction capacitor filters noise generated by the internal band gap to lower output noise. |
| 3 | GND | power_in | Ground pin; the datasheet recommends returning the input and output capacitor grounds and the device GND pin together as close to each other as possible. |
| 4 | EN | input | Driving EN above VEN(high) turns on the regulator, and driving it below VEN(low) puts the regulator into standby mode, disabling the output and reducing operating current; EN must not be left floating. |
| 5 | N/C | unconnected | Not connected; this pin can be tied to ground to improve thermal dissipation. |
| 6 | IN | input | Input to the device, which operates from 2.5 V to 6.5 V; a 0.1-μF to 1-μF capacitor is recommended for better performance. |
| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
CAD (KiCad official)
- Symbol:
TPS71733DRVR - Footprint:
Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm - 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
tps71733drvr-etched.step/tps71733drvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps71733drvr.step/tps71733drvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (45 pp, sha256
9d6a9da698418596, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS71733DRVR
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)
TPS71733DRVR from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | The regulated output voltage pin; a minimum capacitance of 1 μF is required for stability from this pin to ground. |
| 2 | NR/FB | passive | On the fixed-voltage version (TPS71733) this pin is the noise reduction (NR) pin, where a noise reduction capacitor filters noise generated by the internal band gap to lower output noise. |
| 3 | GND | power_in | Ground pin; the datasheet recommends returning the input and output capacitor grounds and the device GND pin together as close to each other as possible. |
| 4 | EN | input | Driving EN above VEN(high) turns on the regulator, and driving it below VEN(low) puts the regulator into standby mode, disabling the output and reducing operating current; EN must not be left floating. |
| 5 | N/C | unconnected | Not connected; this pin can be tied to ground to improve thermal dissipation. |
| 6 | IN | input | Input to the device, which operates from 2.5 V to 6.5 V; a 0.1-μF to 1-μF capacitor is recommended for better performance. |
| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
## CAD (KiCad official)
- Symbol: `TPS71733DRVR`
- Footprint: `Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm`
- 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files: `tps71733drvr-etched.step` / `tps71733drvr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps71733drvr.step` / `tps71733drvr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps717) (45 pp, sha256 `9d6a9da698418596`, retrieved 2026-10-11, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps71733drvr-datasheet.pdf)