component
TPS71709QDSERQ1
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6(1.5x1.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 29d ago |
| viewers | 29d ago |
| package.json | 29d ago |
| page.json | 26d ago |
| README.md | 26d ago |
| tps71709qdserq1-etched.glb | 29d ago |
| tps71709qdserq1-etched.step | 29d ago |
| tps71709qdserq1-hero.glb | 29d ago |
| tps71709qdserq1-hero.overlay.json | 29d ago |
| tps71709qdserq1.glb | 29d ago |
| tps71709qdserq1.kicad_mod | 29d ago |
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| tps71709qdserq1.lbr | 29d ago |
| tps71709qdserq1.step | 29d ago |
TPS71709QDSERQ1
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6(1.5x1.5)
TPS71709QDSERQ1 from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | This pin is the regulated output voltage, and a minimum capacitance of 1 µF is required for stability from this pin to ground. |
| 2 | GND | power_in | Ground pin; ground return connections for the input and output capacitors and the LDO should be placed as close to this pin as possible. |
| 3 | NR | passive | On fixed-voltage versions only, an external capacitor connected to this pin bypasses noise generated by the internal band gap, lowering output noise. |
| 4 | EN | input | Driving EN above VEN(high) turns on the regulator, and driving it below VEN(low) puts the regulator into standby, disabling the output and reducing operating current; the enable pin should not be left floating. |
| 5 | N/C | unconnected | Not connected; this pin can be tied to ground to improve thermal dissipation. |
| 6 | IN | power_in | Input to the device, with a 0.1-µF to 1-µF capacitor recommended for better performance; the device is designed to operate from 2.5 V to 6.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6(1.5x1.5) |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range | VIN | 2.5 | 6.5 | V | 7 | ||
| Output voltage range (TPS717-Q1 fixed-output versions) | VOUT | 0.9 | 5 | V | TPS717-Q1 row | 7 | |
| Output accuracy (nominal), VOUT < 1 V | -2.5 | 2.5 | mV | TA = 25°C, VOUT < 1 V | 7 | ||
| Output accuracy over VIN, IOUT, temperature, VOUT < 1 V | -30 | 30 | mV | VOUT + 0.5 V ≤ VIN ≤ 6.5 V, 0 mA ≤ IOUT ≤ 150 mA, over operating temperature range | 7 | ||
| Dropout voltage | VDO | 170 | 300 | mV | VIN = VOUT(nom) – 0.1 V, IOUT = 150 mA | 7 | |
| Output current limit (fixed output) | ILIM (fixed) | 200 | 325 | 575 | mA | VOUT = 0.9 × VOUT(nom) | 7 |
| Ground pin current | IGND | 45 | 80 | μA | IOUT = 0.1 mA | 7 | |
| Shutdown current (IGND) | ISHDN | 0.2 | 1.5 | μA | VEN ≤ 0.4 V, 2.5 V ≤ VIN < 4.5 V, TA = –40°C to 125°C | 7 | |
| Enable high (enabled) | VEN(high) | 1.2 | 6.5 | V | VIN ≤ 5.5 V | 7 | |
| Enable high (enabled) | VEN(high) | 1.25 | 6.5 | V | 5.5 V < VIN ≤ 6.5 V | 7 | |
| Enable low (shutdown) | VEN(low) | 0 | 0.4 | V | 7 | ||
| Enable pin current, enabled | IEN(high) | 0.02 | 1 | μA | EN = 6.5 V | 7 | |
| Input voltage | VIN | 2.5 | 6.5 | V | over operating free-air temperature range | 6 | |
| Output voltage | VOUT | 0.9 | 5 | V | over operating free-air temperature range | 6 | |
| Output current | IOUT | 0 | 150 | mA | over operating free-air temperature range | 6 | |
| Enable voltage | VEN | 0 | V | maximum printed as VIN (not a numeric value) | 6 | ||
| Output capacitor | COUT | 1 | 100 | µF | footnote (1) applies to adjustable version | 6 | |
| Junction temperature | TJ | -40 | 125 | °C | 6 | ||
| Input voltage | VIN | -0.3 | 7 | V | all voltages with respect to GND | 5 | |
| Noise reduction pin voltage | VNR | -0.3 | 3.6 | V | all voltages with respect to GND | 5 | |
| Enable pin voltage | VEN | -0.3 | V | maximum printed as VIN + 0.3 V (not a numeric value) | 5 | ||
| Output pin voltage | VOUT | -0.3 | 7 | V | all voltages with respect to GND | 5 | |
| Ambient temperature | TA | -40 | 125 | °C | over operating temperature range | 5 | |
| Operating junction temperature | TJ | -55 | 150 | °C | as printed | 5 | |
| Storage temperature | Tstg | -55 | 150 | °C | 5 | ||
| Junction-to-ambient thermal resistance | RθJA | 190.5 | °C/W | DSE (WSON, 6 pins) | 6 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 94.9 | °C/W | DSE (WSON, 6 pins) | 6 | ||
| Junction-to-board thermal resistance | RθJB | 149.3 | °C/W | DSE (WSON, 6 pins) | 6 | ||
| Junction-to-top characterization parameter | ψJT | 6.4 | °C/W | DSE (WSON, 6 pins) | 6 | ||
| Junction-to-board characterization parameter | ψJB | 152.8 | °C/W | DSE (WSON, 6 pins) | 6 |
CAD (KiCad official)
- Symbol:
TPS71709QDSERQ1 - Footprint:
Package_SON:WSON-6_1.5x1.5mm_P0.5mm - 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)
- 3D model files:
tps71709qdserq1-etched.step/tps71709qdserq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps71709qdserq1.step/tps71709qdserq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (39 pp, sha256
2be05880cde1a822, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).