main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tps715a33drbr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
viewers tps715a33drbr: viewers · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md tps715a33drbr: factory component page (tier=lcsc) · Ray 4d ago
tps715a33drbr-etched.fit.json tps715a33drbr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tps715a33drbr-etched.glb tps715a33drbr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
tps715a33drbr-etched.step tps715a33drbr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
tps715a33drbr.glb Publish 0.1.0 · Ray 4d ago
tps715a33drbr.kicad_mod Publish 0.1.0 · Ray 4d ago
tps715a33drbr.kicad_sym tps715a33drbr: factory component page (tier=lcsc) · Ray 4d ago
tps715a33drbr.lbr tps715a33drbr: factory component page (tier=lcsc) · Ray 4d ago
tps715a33drbr.step tps715a33drbr: factory component page (tier=lcsc) · Ray 4d ago

TPS715A33DRBR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · VSON-8-EP(3x3)

TPS715A33DRBR from Texas Instruments, in a VSON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN input Input supply pin. Use a capacitor with a value of 0.1 µF or larger from this pin to ground. See the Input and Output Capacitor Requirements section for more information.
2 NC unconnected No connect pin. This pin is not connected internally. Connect this pin to ground for best thermal performance, or leave floating.
3 NC unconnected No connect pin. This pin is not connected internally. Connect this pin to ground for best thermal performance, or leave floating.
4 GND power_in Ground pin.
5 NC unconnected No connect pin. This pin is not connected internally. Connect this pin to ground for best thermal performance, or leave floating.
6 NC unconnected No connect pin. This pin is not connected internally. Connect this pin to ground for best thermal performance, or leave floating.
7 NC unconnected No connect pin. This pin is not connected internally. Connect this pin to ground for best thermal performance, or leave floating.
8 OUT output Output of the regulator. For the new chip, a capacitor with a value of 1 µF or larger is required from this pin to ground. See the Input and Output Capacitor Requirements section for more information.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSON-8-EP(3x3)
Category Power Management (PMIC)
Pins 9

CAD (KiCad official)

  • Symbol: TPS715A33DRBR
  • Footprint: Package_SON:VSON-8-1EP_3x3mm_P0.65mm_EP1.6x2.4mm
  • 3D model: VSON-8-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps715a33drbr-etched.step / tps715a33drbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps715a33drbr.step / tps715a33drbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (40 pp, sha256 9fa2f3e352436ff9, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF