component
TPS715A01DRVR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 28d ago |
| viewers | 28d ago |
| package.json | 28d ago |
| page.json | 28d ago |
| README.md | 28d ago |
| tps715a01drvr-etched.glb | 28d ago |
| tps715a01drvr-etched.step | 28d ago |
| tps715a01drvr-hero.glb | 28d ago |
| tps715a01drvr-hero.overlay.json | 28d ago |
| tps715a01drvr.glb | 28d ago |
| tps715a01drvr.kicad_mod | 28d ago |
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| tps715a01drvr.lbr | 28d ago |
| tps715a01drvr.step | 28d ago |
TPS715A01DRVR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)
TPS715A01DRVR from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Input supply pin; VIN is 2.5 V to 24 V recommended, with a 30 V absolute maximum for the new chip, and a capacitor of 0.1 µF or larger should be connected from this pin to ground. |
| 2 | NC | unconnected | No-connect pin, not connected internally; connect to ground for best thermal performance or leave floating. |
| 3 | GND | power_in | Ground pin for the regulator; the datasheet also lists the exposed thermal pad as GND. |
| 4 | FB | input | In the adjustable configuration this pin sets the output voltage through an external feedback divider, with VFB limited to 2.4 V maximum for the adjustable new chip. |
| 5 | NC | unconnected | No-connect pin, not connected internally; connect to ground for best thermal performance or leave floating. |
| 6 | OUT | output | Regulator output; the new chip requires a capacitor of 1 µF or larger from this pin to ground, and the effective capacitance must stay above 0.47 µF. |
| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
CAD (KiCad official)
- Symbol:
TPS715A01DRVR - Footprint:
Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm - 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
tps715a01drvr-etched.step/tps715a01drvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps715a01drvr.step/tps715a01drvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (40 pp, sha256
9fa2f3e352436ff9, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).