component

TPS71550DCKR-TP

Public Made by Adom

by adom

TECH PUBLIC Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SC-70-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tps71550dckr-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json tps71550dckr-tp: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md tps71550dckr-tp: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
tps71550dckr-tp-etched.fit.json tps71550dckr-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tps71550dckr-tp-etched.glb tps71550dckr-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tps71550dckr-tp-etched.step tps71550dckr-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tps71550dckr-tp.glb Publish 0.1.0 · Ray
tps71550dckr-tp.kicad_mod Publish 0.1.0 · Ray
tps71550dckr-tp.kicad_sym Publish 0.1.0 · Ray
tps71550dckr-tp.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tps71550dckr-tp.step Publish 0.1.0 · Ray

TPS71550DCKR-TP

TECH PUBLIC · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SC-70-5

TPS71550DCKR-TP from TECH PUBLIC, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection. Leave floating or tie to GND on the board.
2 GND power_in Device ground reference. All output/input voltages are referenced to this pin.
3 NC unconnected No internal connection. Leave floating or tie to GND on the board.
4 IN power_in Unregulated supply input, 2.7 V to 24 V (28 V abs max). Bypass with a ≥1 µF capacitor to GND placed close to the pin.
5 OUT power_out Regulated 5.0 V output, up to 50 mA drive (current limit 50-150 mA). Requires a ≥1 µF output capacitor to GND for stability.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SC-70-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • TPS71550DCKR-TP

CAD (KiCad official)

  • Symbol: TPS71550DCKR-TP
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SC-70-5 (KiCad packages3D, STEP)
  • 3D model files: tps71550dckr-tp-etched.step / tps71550dckr-tp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps71550dckr-tp.step / tps71550dckr-tp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (7 pp, sha256 e6a758c164e66b57, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF