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TPS7101QP

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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS7101QP

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · PDIP-8

TPS7101QP from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Device ground reference; all datasheet voltage values are specified with respect to network terminal ground.
2 EN input Enable input: a high level (VIH min 2 V) shuts the regulator down and a low level (VIL max 0.5 V) enables it, with EN tied to ground when the shutdown feature is not used; absolute maximum input range for EN is -0.3 V to 11 V.
3 IN power_in Regulator input supply; recommended input voltage for the TPS7101Q is 2.5 V to 10 V and absolute maximum input range is -0.3 V to 11 V.
4 IN power_in Second regulator input pin, internally tied with pin 3 to the input supply; recommended input voltage 2.5 V to 10 V and absolute maximum -0.3 V to 11 V.
5 OUT power_out Regulated output; the device supplies up to 500 mA (absolute maximum output current 2 A) and needs an output capacitor of about 10 µF solid tantalum with ESR below 1.2 Ω for stability.
6 OUT power_out Second regulated output pin, internally tied with pin 5; same 0 mA to 500 mA output range and stability requirements apply.
7 FB input Feedback input of the adjustable TPS7101 (Vref 1.178 V typical) that sets the output via an external R1/R2 divider; large divider resistors should be avoided because leakage at FB introduces error.
8 PG output Open-drain power-good output that pulls low when the output falls to 92% to 98% of nominal and requires an external pullup resistor, or can be left floating if unused; absolute maximum input range for PG is -0.3 V to 11 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage, TPS7101Q VI 2.5 10 V TPS7101Q 5
High-level input voltage at EN VIH 2 V 5
Low-level input voltage at EN VIL 0.5 V 5
Output current range IO 0 500 mA 5
Operating virtual junction temperature range TJ -40 125 °C 5
Input voltage range (VI, PG, SENSE, EN) VI -0.3 11 V With respect to network terminal ground 4
Output current IO 2 A 4
Operating virtual junction temperature range TJ -55 150 °C 4
Storage temperature range Tstg -65 150 °C 4
Lead temperature 260 °C 1.6 mm (1/16 inch) from case for 10 seconds 4
Continuous total power dissipation, P package 1175 mW P package, TA ≤ 25°C (free-air); derate 9.4 mW/°C above 25°C 4
Continuous total power dissipation, P package 2738 mW P package, TC ≤ 25°C (case); derate 21.9 mW/°C above 25°C 4
Thermal resistance junction-to-ambient, P package RθJA 106 °C/W P package 5
Thermal resistance junction-to-case, P package RθJC 46 °C/W P package 5
Ground current (active mode) 285 350 µA EN ≤ 0.5 V, VI = VO + 1 V, 25°C 6
Ground current (active mode) 460 µA EN ≤ 0.5 V, 0 mA ≤ IO ≤ 500 mA, VI ≥ VO + 1 V, –40°C to 125°C 6
Input current (standby mode) 0.5 µA 2.7 V ≤ VI ≤ 10 V, 25°C 6
Input current (standby mode) 2 µA EN = VI, 2.7 V ≤ VI ≤ 10 V, –40°C to 125°C 6
Output current limit 1.2 2 A VO = 0, VI = 10 V, 25°C 6
Output current limit 2 A VO = 0, VI = 10 V, –40°C to 125°C 6
Pass-element leakage current in standby mode 0.5 µA 2.7 V ≤ VI ≤ 10 V, 25°C 6
Pass-element leakage current in standby mode 1 µA EN = VI, 2.7 V ≤ VI ≤ 10 V, –40°C to 125°C 6
PG leakage current 0.02 0.5 µA Normal operation, VPG = 10 V, 25°C 6
PG leakage current 0.5 µA Normal operation, VPG = 10 V, –40°C to 125°C 6
Output voltage temperature coefficient 61 75 ppm/°C –40°C to 125°C 6
EN logic high (standby mode) 2 V 2.5 V ≤ VI ≤ 6 V, –40°C to 125°C 6
EN logic high (standby mode) 2.7 V 6 V ≤ VI ≤ 10 V, –40°C to 125°C 6
EN logic low (active mode) 0.5 V 2.7 V ≤ VI ≤ 10 V, 25°C 6
EN input current -0.5 0.5 µA 0 V ≤ VI ≤ 10 V, 25°C 6
Minimum VI for active pass element 2.05 2.5 V 25°C 6
Minimum VI for active pass element 2.5 V –40°C to 125°C 6
Minimum VI for valid PG 1.06 1.5 V IPG = 300 µA, 25°C 6
Minimum VI for valid PG 1.9 V IPG = 300 µA, –40°C to 125°C 6
Thermal shutdown junction temperature 165 °C 6
Reference voltage (measured at FB with OUT connected to FB) 1.143 1.213 V 2.5 V ≤ VI ≤ 10 V, 5 mA ≤ IO ≤ 500 mA, –40°C to 125°C 7
Reference voltage temperature coefficient 61 75 ppm/°C –40°C to 125°C 7
Pass-element series resistance 0.7 1 Ω VI = 2.4 V, 50 µA ≤ IO ≤ 150 mA, 25°C 7
Pass-element series resistance 1 Ω VI = 2.4 V, 50 µA ≤ IO ≤ 150 mA, –40°C to 125°C 7
Pass-element series resistance 0.83 1.3 Ω VI = 2.4 V, 150 mA ≤ IO ≤ 500 mA, 25°C 7
Pass-element series resistance 1.3 Ω VI = 2.4 V, 150 mA ≤ IO ≤ 500 mA, –40°C to 125°C 7
Pass-element series resistance 0.52 0.85 Ω VI = 2.9 V, 50 µA ≤ IO ≤ 500 mA, 25°C 7
Pass-element series resistance 0.85 Ω VI = 2.9 V, 50 µA ≤ IO ≤ 500 mA, –40°C to 125°C 7
Input regulation 25 mV VI = 2.5 V to 10 V, 50 µA ≤ IO ≤ 500 mA, –40°C to 125°C 7
Output regulation 25 mV IO = 5 mA to 500 mA, 2.5 V ≤ VI ≤ 10 V, –40°C to 125°C 7
Output regulation 54 mV IO = 50 µA to 500 mA, 2.5 V ≤ VI ≤ 10 V, –40°C to 125°C 7
Ripple rejection 48 59 dB f = 120 Hz, IO = 50 µA, 25°C 7
Ripple rejection 44 dB f = 120 Hz, IO = 50 µA, –40°C to 125°C 7
Ripple rejection 45 54 dB f = 120 Hz, IO = 500 mA, 25°C 7
PG trip-threshold voltage VPG 1.101 1.145 V VFB voltage decreasing from above VPG, –40°C to 125°C 7
PG output low voltage 0.1 0.4 V IPG = 400 µA, VI = 2.13 V, 25°C 7
PG output low voltage 0.4 V IPG = 400 µA, VI = 2.13 V, –40°C to 125°C 7
FB input current -10 0.1 10 nA 25°C 7
FB input current -20 20 nA –40°C to 125°C 7

CAD (KiCad official)

  • Symbol: TPS7101QP
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: PDIP-8 (KiCad packages3D, STEP)
  • 3D model files: tps7101qp-etched.step / tps7101qp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps7101qp.step / tps7101qp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (41 pp, sha256 6da6cbc880c8f130, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF