component
TPS709B50DBVT
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS709B50DBVT
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TPS709B50DBVT from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the regulator. |
| 2 | IN | power_in | Unregulated input to the device, with an input voltage range of 2.7 V to 30 V. |
| 3 | OUT | power_out | Regulated output voltage; connect a small 2.2-µF or greater ceramic capacitor from this pin to ground to assure stability. |
| 4 | NC | unconnected | No internal connection. |
| 5 | EN | input | Drive high to enable the device and low for low-current shutdown; the maximum voltage must remain below 6.5 V and the pin can be left floating to enable the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range | VIN | 2.7 | 30 | V | 4 | ||
| Output voltage | VOUT | 1.2 | 6.5 | V | 4 | ||
| Enable voltage | VEN | 0 | 6.5 | V | 4 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Input voltage | VIN | -0.3 | 32 | V | 4 | ||
| Enable voltage | VEN | -0.3 | 7 | V | 4 | ||
| Output voltage | VOUT | -0.3 | 7 | V | 4 | ||
| Operating junction temperature | TJ | -55 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 4 | ||
| DC output accuracy | VOUT | -1 | 1 | % | VOUT ≥ 3.3 V | 5 | |
| Line regulation | ΔVOUT | 3 | 10 | mV | (VOUT(nom) + 1 V, 2.7 V) ≤ VIN ≤ 30 V | 5 | |
| Load regulation | ΔVOUT | 20 | 50 | mV | VIN = VOUT(typ) + 1.5 V or 3 V (whichever is greater), 100 µA ≤ IOUT ≤ 150 mA | 5 | |
| Dropout voltage | VDO | 245 | 500 | mV | TPS70950, IOUT = 50 mA | 5 | |
| Dropout voltage | VDO | 690 | 1200 | mV | TPS70950, IOUT = 150 mA | 5 | |
| Output current limit | I(CL) | 200 | 320 | 500 | mA | VOUT = 0.9 × VOUT(nom) | 5 |
| Ground pin current | IGND | 1.4 | 2.25 | µA | IOUT = 0 mA, VOUT > 3.3 V | 5 | |
| Ground pin current | IGND | 350 | µA | IOUT = 150 mA | 5 | ||
| Shutdown current | ISHUTDOWN | 150 | nA | VEN ≤ 0.4 V, VIN = 2.7 V | 5 | ||
| Output noise voltage | Vn | 190 | μVRMS | BW = 10 Hz to 100 kHz, IOUT = 10 mA, VIN = 2.7 V, VOUT = 1.2 V | 5 | ||
| Start-up time | tSTR | 500 | 1500 | µs | VOUT(nom) > 3.3 V | 5 | |
| Enable pin high-level input voltage | VEN(HI) | 0.9 | V | Device enabled | 5 | ||
| Enable pin low-level input voltage | VEN(LOW) | 0 | 0.4 | V | Device disabled | 5 | |
| EN pin current | IEN | 300 | nA | EN = 1.0 V, VIN = 5.5 V | 5 | ||
| Reverse current (flowing out of IN pin) | I(REV) | 10 | nA | VOUT = 3 V, VIN = VEN = 0 V | 5 | ||
| Reverse current (flowing into OUT pin) | I(REV) | 100 | nA | VOUT = 3 V, VIN = VEN = 0 V | 5 | ||
| Thermal shutdown temperature | tSD | 158 | °C | Shutdown, temperature increasing | 5 | ||
| Thermal shutdown reset temperature | tSD | 140 | °C | Reset, temperature decreasing | 5 | ||
| Junction-to-ambient thermal resistance | RθJA | 212.1 | °C/W | DBV (5-pin) package | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 78.5 | °C/W | DBV (5-pin) package | 4 | ||
| Junction-to-board thermal resistance | RθJB | 39.5 | °C/W | DBV (5-pin) package | 4 | ||
| Junction-to-top characterization parameter | ψJT | 2.86 | °C/W | DBV (5-pin) package | 4 | ||
| Junction-to-board characterization parameter | ψJB | 38.7 | °C/W | DBV (5-pin) package | 4 |
CAD (KiCad official)
- Symbol:
TPS709B50DBVT - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps709b50dbvt-etched.step/tps709b50dbvt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps709b50dbvt.step/tps709b50dbvt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (43 pp, sha256
8c14e3efae738a27, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS709B50DBVT
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TPS709B50DBVT from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the regulator. |
| 2 | IN | power_in | Unregulated input to the device, with an input voltage range of 2.7 V to 30 V. |
| 3 | OUT | power_out | Regulated output voltage; connect a small 2.2-µF or greater ceramic capacitor from this pin to ground to assure stability. |
| 4 | NC | unconnected | No internal connection. |
| 5 | EN | input | Drive high to enable the device and low for low-current shutdown; the maximum voltage must remain below 6.5 V and the pin can be left floating to enable the device. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range | VIN | 2.7 | | 30 | V | | 4 |
| Output voltage | VOUT | 1.2 | | 6.5 | V | | 4 |
| Enable voltage | VEN | 0 | | 6.5 | V | | 4 |
| Operating junction temperature | TJ | -40 | | 125 | °C | | 4 |
| Input voltage | VIN | -0.3 | | 32 | V | | 4 |
| Enable voltage | VEN | -0.3 | | 7 | V | | 4 |
| Output voltage | VOUT | -0.3 | | 7 | V | | 4 |
| Operating junction temperature | TJ | -55 | | 150 | °C | | 4 |
| Storage temperature | Tstg | -55 | | 150 | °C | | 4 |
| DC output accuracy | VOUT | -1 | | 1 | % | VOUT ≥ 3.3 V | 5 |
| Line regulation | ΔVOUT | | 3 | 10 | mV | (VOUT(nom) + 1 V, 2.7 V) ≤ VIN ≤ 30 V | 5 |
| Load regulation | ΔVOUT | | 20 | 50 | mV | VIN = VOUT(typ) + 1.5 V or 3 V (whichever is greater), 100 µA ≤ IOUT ≤ 150 mA | 5 |
| Dropout voltage | VDO | | 245 | 500 | mV | TPS70950, IOUT = 50 mA | 5 |
| Dropout voltage | VDO | | 690 | 1200 | mV | TPS70950, IOUT = 150 mA | 5 |
| Output current limit | I(CL) | 200 | 320 | 500 | mA | VOUT = 0.9 × VOUT(nom) | 5 |
| Ground pin current | IGND | | 1.4 | 2.25 | µA | IOUT = 0 mA, VOUT > 3.3 V | 5 |
| Ground pin current | IGND | | 350 | | µA | IOUT = 150 mA | 5 |
| Shutdown current | ISHUTDOWN | | 150 | | nA | VEN ≤ 0.4 V, VIN = 2.7 V | 5 |
| Output noise voltage | Vn | | 190 | | μVRMS | BW = 10 Hz to 100 kHz, IOUT = 10 mA, VIN = 2.7 V, VOUT = 1.2 V | 5 |
| Start-up time | tSTR | | 500 | 1500 | µs | VOUT(nom) > 3.3 V | 5 |
| Enable pin high-level input voltage | VEN(HI) | 0.9 | | | V | Device enabled | 5 |
| Enable pin low-level input voltage | VEN(LOW) | 0 | | 0.4 | V | Device disabled | 5 |
| EN pin current | IEN | | 300 | | nA | EN = 1.0 V, VIN = 5.5 V | 5 |
| Reverse current (flowing out of IN pin) | I(REV) | | 10 | | nA | VOUT = 3 V, VIN = VEN = 0 V | 5 |
| Reverse current (flowing into OUT pin) | I(REV) | | 100 | | nA | VOUT = 3 V, VIN = VEN = 0 V | 5 |
| Thermal shutdown temperature | tSD | | 158 | | °C | Shutdown, temperature increasing | 5 |
| Thermal shutdown reset temperature | tSD | | 140 | | °C | Reset, temperature decreasing | 5 |
| Junction-to-ambient thermal resistance | RθJA | | 212.1 | | °C/W | DBV (5-pin) package | 4 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 78.5 | | °C/W | DBV (5-pin) package | 4 |
| Junction-to-board thermal resistance | RθJB | | 39.5 | | °C/W | DBV (5-pin) package | 4 |
| Junction-to-top characterization parameter | ψJT | | 2.86 | | °C/W | DBV (5-pin) package | 4 |
| Junction-to-board characterization parameter | ψJB | | 38.7 | | °C/W | DBV (5-pin) package | 4 |
## CAD (KiCad official)
- Symbol: `TPS709B50DBVT`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `tps709b50dbvt-etched.step` / `tps709b50dbvt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps709b50dbvt.step` / `tps709b50dbvt.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps709.pdf) (43 pp, sha256 `8c14e3efae738a27`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps709b50dbvt-datasheet.pdf)