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Contents

README

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TPS709B50DBVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS709B50DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference pin for the regulator; the thermal pad is electrically connected to this GND node.
2 IN power_in Unregulated input to the device, with an input voltage range of 2.7 V to 30 V.
3 OUT power_out Regulated output voltage; connect a small 2.2-µF or greater ceramic capacitor from this pin to ground to assure stability.
4 NC unconnected No internal connection.
5 EN input Enable pin: drive high to enable the device, drive low for low-current shutdown, and keep the maximum voltage below 6.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage VIN -0.3 32 V 4
Enable voltage VEN -0.3 7 V 4
Output voltage VOUT -0.3 7 V 4
Operating junction temperature TJ -55 150 °C 4
Storage temperature Tstg -55 150 °C 4
Input voltage VIN 2.7 30 V 4
Output voltage VOUT 1.2 6.5 V 4
Enable voltage VEN 0 6.5 V 4
Operating junction temperature TJ -40 125 °C 4
Junction-to-ambient thermal resistance RθJA 212.1 °C/W DBV package, 5 pins 4
Junction-to-case (top) thermal resistance RθJC(top) 78.5 °C/W DBV package, 5 pins 4
Junction-to-board thermal resistance RθJB 39.5 °C/W DBV package, 5 pins 4
Junction-to-top characterization parameter ψJT 2.86 °C/W DBV package, 5 pins 4
Junction-to-board characterization parameter ψJB 38.7 °C/W DBV package, 5 pins 4
DC output accuracy VOUT -1 1 % VOUT ≥ 3.3 V 5
Line regulation ΔVOUT 3 10 mV (VOUT(nom) + 1 V, 2.7 V) ≤ VIN ≤ 30 V 5
Load regulation ΔVOUT 20 50 mV VIN = VOUT(typ) + 1.5 V or 3 V (whichever is greater), 100 µA ≤ IOUT ≤ 150 mA 5
Dropout voltage (TPS70950) VDO 245 500 mV TPS70950, IOUT = 50 mA 5
Dropout voltage (TPS70950) VDO 690 1200 mV TPS70950, IOUT = 150 mA 5
Output current limit I(CL) 200 320 500 mA VOUT = 0.9 × VOUT(nom) 5
Ground pin current IGND 1.4 2.25 µA IOUT = 0 mA, VOUT > 3.3 V 5
Start-up time tSTR 500 1500 µs VOUT(nom) > 3.3 V 5
Enable pin low-level input voltage VEN(LOW) 0 0.4 V Device disabled 5

CAD (KiCad official)

  • Symbol: TPS709B50DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps709b50dbvr-etched.step / tps709b50dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps709b50dbvr.step / tps709b50dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 8c14e3efae738a27, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF