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TPS70950QDRVRQ1

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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs tps70950qdrvrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers tps70950qdrvrq1: viewers · Ray 1mo ago
package.json tps70950qdrvrq1: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
page.json tps70950qdrvrq1: specified limits as data (metadata.characteristics, 49 rows from the datasheet) · Ray 26d ago
README.md tps70950qdrvrq1: specified limits as data (metadata.characteristics, 49 rows from the datasheet) · Ray 26d ago
tps70950qdrvrq1-etched.fit.json tps70950qdrvrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tps70950qdrvrq1-etched.glb tps70950qdrvrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tps70950qdrvrq1-etched.step tps70950qdrvrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tps70950qdrvrq1.glb Publish 0.1.0 · Ray 1mo ago
tps70950qdrvrq1.kicad_mod Publish 0.1.0 · Ray 1mo ago
tps70950qdrvrq1.kicad_sym Publish 0.1.0 · Ray 1mo ago
tps70950qdrvrq1.lbr Publish 0.1.0 · Ray 1mo ago
tps70950qdrvrq1.step Publish 0.1.0 · Ray 1mo ago

TPS70950QDRVRQ1

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)

TPS70950QDRVRQ1 from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Regulated output voltage; minimum 2.2 µF ceramic capacitor required between this pin and ground for stability.
2 NC unconnected No internal connection
3 GND power_in Ground
4 EN input Enable input; drive above 0.9 V to enable device, below 0.4 V to disable; can be left floating; maximum voltage 6.5 V.
5 NC unconnected No internal connection
6 IN power_in Unregulated input supply; input voltage range 2.7 V to 30 V.
7 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6-EP(2x2)
Category Power Management (PMIC)
Pins 7

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage (recommended operating) VIN 2.7 30 V 4
Output voltage (recommended operating) VOUT 1.2 6.5 V 4
Output current (recommended operating) IOUT 0 150 mA 4
Enable voltage (recommended operating) VEN 0 6.5 V 4
Output capacitor (recommended operating) COUT 2 2.2 47 µF 4
Operating junction temperature (recommended operating) TJ -40 125 °C 4
Input voltage (absolute maximum) VIN -0.3 32 V 3
Enable voltage (absolute maximum) VEN -0.3 7 V 3
Output voltage (absolute maximum) VOUT -0.3 7 V 3
Junction temperature (absolute maximum) TJ -55 150 °C 3
Ambient temperature (absolute maximum) TA -40 125 °C 3
Storage temperature (absolute maximum) Tstg -55 150 °C 3
Input voltage range VIN 2.7 30 V 5
Output voltage range VOUT 1.2 6.5 V 5
DC output accuracy VOUT -1 1 % VOUT ≥ 3.3V 5
Line regulation ΔVOUT 3 10 mV (VOUT(nom) + 1V, 2.7V) ≤ VIN ≤ 30V 5
Load regulation ΔVOUT 20 50 mV VIN = VOUT(typ) + 1.5V or 3V (whichever is greater), 100µA ≤ IOUT ≤ 150mA 5
Dropout voltage TPS70950 at 50 mA VDO 245 500 mV TPS70950, IOUT= 50mA 5
Dropout voltage TPS70950 at 150 mA VDO 690 1200 mV TPS70950, IOUT= 150mA 5
Output current limit ICL 200 320 500 mA VOUT= 0.9 × VOUT(nom) 5
Ground pin current (VOUT > 3.3V) IGND 1.4 2.7 µA IOUT= 0mA, VOUT > 3.3V 5
Ground pin current at 100 µA load IGND 6.7 10 µA IOUT= 100µA, VIN = 30V 5
Enable low input voltage (device disabled) VEN(LOW) 0 0.4 V device disabled 5
Startup time (VOUT(nom) > 3.3V) tSTR 500 1500 µs VOUT(nom) > 3.3V 6
Shutdown current ISHDN 150 nA VEN ≤ 0.4V, VIN = 2.7V 5
Ground pin current at 150 mA load IGND 350 µA IOUT = 150mA 5
Power supply rejection ratio at 10 Hz PSRR 80 dB f = 10Hz 5
Power supply rejection ratio at 100 Hz PSRR 62 dB f = 100Hz 5
Power supply rejection ratio at 1 kHz PSRR 52 dB f = 1kHz 5
Output noise voltage Vn 190 µVRMS BW = 10Hz to 100kHz, IOUT= 10mA, VIN = 2.7V, VOUT = 1.2V 5
Enable high input voltage (device enabled) VEN(HI) 0.9 V device enabled 5
EN pin current IEN 300 nA EN = 1.0V, VIN = 5.5V 5
Reverse current flowing out of IN pin IREV 10 nA VOUT = 3V, VIN = VEN = 0V 5
Reverse current flowing into OUT pin IREV 100 nA VOUT = 3V, VIN = VEN = 0V 5
Thermal shutdown temperature (shutdown, rising) TSD 158 °C temperature rising (shutdown) 5
Thermal shutdown reset temperature (falling) TSD 140 °C temperature falling (reset) 5
Startup time (enable to 95% VOUT) tSTR 200 µs from VEN > VEN(HI) to VOUT = 95% of VOUT(NOM), 1V/us 6
Junction-to-ambient thermal resistance (DRV, old die) RθJA 73.1 °C/W 旧芯片 (old die) 4
Junction-to-ambient thermal resistance (DRV, new die) RθJA 82.5 °C/W 新芯片 (new die) 4
Junction-to-case (top) thermal resistance (DRV, old die) RθJC(top) 97 °C/W 旧芯片 (old die) 4
Junction-to-case (top) thermal resistance (DRV, new die) RθJC(top) 101.25 °C/W 新芯片 (new die) 4
Junction-to-board thermal resistance (DRV, old die) RθJB 42.6 °C/W 旧芯片 (old die) 4
Junction-to-board thermal resistance (DRV, new die) RθJB 49.1 °C/W 新芯片 (new die) 4
Junction-to-top characterization parameter (DRV, old die) ΨJT 2.9 °C/W 旧芯片 (old die) 4
Junction-to-top characterization parameter (DRV, new die) ΨJT 5.8 °C/W 新芯片 (new die) 4
Junction-to-board characterization parameter (DRV, old die) ΨJB 42.9 °C/W 旧芯片 (old die) 4
Junction-to-board characterization parameter (DRV, new die) ΨJB 49.14 °C/W 新芯片 (new die) 4
Junction-to-case (bottom) thermal resistance (DRV, old die) RθJC(bot) 12.8 °C/W 旧芯片 (old die) 4
Junction-to-case (bottom) thermal resistance (DRV, new die) RθJC(bot) 19.8 °C/W 新芯片 (new die) 4

CAD (KiCad official)

  • Symbol: TPS70950QDRVRQ1
  • Footprint: Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
  • 3D model files: tps70950qdrvrq1-etched.step / tps70950qdrvrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps70950qdrvrq1.step / tps70950qdrvrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 ed3126ec0589e178, retrieved 2026-09-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF