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TPS70950DRVRM3
Public Made by Adomby adom
Texas Instruments Pre-ordered Chips, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS70950DRVRM3
Texas Instruments · Pre-ordered Chips · WSON-6-EP(2x2)
TPS70950DRVRM3 from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output voltage; connect a 2.2-µF or greater ceramic capacitor from this pin to ground to assure stability. |
| 2 | NC | unconnected | No internal connection. |
| 3 | GND | power_in | Ground. |
| 4 | EN | input | Enable pin: drive high to enable the device, drive low for low-current shutdown, may be left floating to enable; maximum voltage must remain below 6.5 V. |
| 5 | NC | unconnected | No internal connection. |
| 6 | IN | power_in | Unregulated input to the device, 2.7 V to 30 V recommended operating range. |
| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6-EP(2x2) |
| Category | Interface ICs |
| Pins | 7 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range | VIN | 2.7 | 30 | V | 5 | ||
| DC output accuracy | VOUT | -1 | 1 | % | VOUT ≥ 3.3 V | 5 | |
| Line regulation | ΔVOUT | 3 | 10 | mV | (VOUT(nom) + 1 V, 2.7 V) ≤ VIN ≤ 30 V | 5 | |
| Load regulation | ΔVOUT | 20 | 50 | mV | VIN = VOUT(typ) + 1.5 V or 3 V (whichever is greater), 100 µA ≤ IOUT ≤ 150 mA | 5 | |
| Dropout voltage | VDO | 245 | 500 | mV | TPS70950, IOUT = 50 mA | 5 | |
| Dropout voltage | VDO | 690 | 1200 | mV | TPS70950, IOUT = 150 mA | 5 | |
| Output current limit | I(CL) | 200 | 320 | 500 | mA | VOUT = 0.9 × VOUT(nom) | 5 |
| Ground pin current | IGND | 1.4 | 2.25 | µA | IOUT = 0 mA, VOUT > 3.3 V | 5 | |
| Ground pin current | IGND | 350 | µA | IOUT = 150 mA | 5 | ||
| Shutdown current | ISHUTDOWN | 150 | nA | VEN ≤ 0.4 V, VIN = 2.7 V | 5 | ||
| Start-up time | tSTR | 500 | 1500 | µs | VOUT(nom) > 3.3 V | 5 | |
| Enable pin high-level input voltage | VEN(HI) | 0.9 | V | Device enabled | 5 | ||
| Enable pin low-level input voltage | VEN(LOW) | 0 | 0.4 | V | Device disabled | 5 | |
| EN pin current | IEN | 300 | nA | EN = 1.0 V, VIN = 5.5 V | 5 | ||
| Reverse current (flowing out of IN pin) | I(REV) | 10 | nA | VOUT = 3 V, VIN = VEN = 0 V | 5 | ||
| Reverse current (flowing into OUT pin) | I(REV) | 100 | nA | VOUT = 3 V, VIN = VEN = 0 V | 5 | ||
| Power-supply rejection ratio | PSRR | 62 | dB | f = 100 Hz | 5 | ||
| Thermal shutdown temperature | tSD | 158 | °C | Shutdown, temperature increasing | 5 | ||
| Thermal shutdown reset temperature | tSD | 140 | °C | Reset, temperature decreasing | 5 | ||
| Input voltage | VIN | 2.7 | 30 | V | 4 | ||
| Output voltage | VOUT | 1.2 | 6.5 | V | 4 | ||
| Enable voltage | VEN | 0 | 6.5 | V | 4 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Input voltage | VIN | -0.3 | 32 | V | 4 | ||
| Enable voltage | VEN | -0.3 | 7 | V | 4 | ||
| Output voltage | VOUT | -0.3 | 7 | V | 4 | ||
| Operating junction temperature | TJ | -55 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 73.1 | °C/W | DRV, 6 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 97 | °C/W | DRV, 6 pins | 4 | ||
| Junction-to-board thermal resistance | RθJB | 42.6 | °C/W | DRV, 6 pins | 4 | ||
| Junction-to-top characterization parameter | ψJT | 2.9 | °C/W | DRV, 6 pins | 4 | ||
| Junction-to-board characterization parameter | ψJB | 42.9 | °C/W | DRV, 6 pins | 4 | ||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 12.8 | °C/W | DRV, 6 pins | 4 |
CAD (KiCad official)
- Symbol:
TPS70950DRVRM3 - Footprint:
Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm - 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
tps70950drvrm3-etched.step/tps70950drvrm3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps70950drvrm3.step/tps70950drvrm3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (40 pp, sha256
c2e78bfb71f627cf, retrieved 2026-10-23, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).