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TPS70933DBVR

Public Made by Adom

by adom

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tps70933dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json tps70933dbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
README.md tps70933dbvr: specified limits as data (metadata.characteristics, 24 rows from the datasheet) · Ray
tps70933dbvr-etched.fit.json tps70933dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tps70933dbvr-etched.glb tps70933dbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
tps70933dbvr-etched.step tps70933dbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
tps70933dbvr.glb Publish 0.1.0 · Ray
tps70933dbvr.kicad_mod Publish 0.1.0 · Ray
tps70933dbvr.kicad_sym Publish 0.1.0 · Ray
tps70933dbvr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tps70933dbvr.step Publish 0.1.0 · Ray

TPS70933DBVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS70933DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Unregulated input to the device. Operating input range 2.7 V to 30 V (absolute max 32 V). Bypass with a 1-µF ceramic capacitor to GND close to the pin.
2 GND power_in Device ground reference. All voltages are referenced to this pin.
3 EN input Enable pin. Drive high to enable the regulator; drive low to place the device in low-current shutdown (~150 nA typical). May be left floating to enable the device. Maximum voltage 6.5 V (absolute max 7 V).
4 NC unconnected No internal connection. May be left floating or tied to any potential.
5 OUT power_out Regulated 3.3-V output (fixed for TPS70933). Connect a 2.2-µF or larger ceramic capacitor from this pin to GND to ensure stability. Supplies up to 150 mA continuous (200-mA peak).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • TPS70933DBVR
  • TPS70933DBVRDBVT
  • TPS70933DBVRDRVR
  • TPS70933DBVRDRVT

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage range VIN 2.7 30 V 6
Output voltage range VOUT 1.2 6.5 V 6
DC output accuracy VOUT -1 1 % VOUT ≥ 3.3 V 6
Line regulation ΔVOUT 3 10 mV (VOUT(nom) + 1 V, 2.7 V) ≤ VIN ≤ 30 V 6
Load regulation ΔVOUT 20 50 mV IN = VOUT(typ) + 1.5 V or 3 V (whichever is greater), 100 µA ≤ IOUT ≤ 150 mA 6
Dropout voltage, TPS70933 VDO 295 650 mV IOUT = 50 mA 6
Dropout voltage, TPS70933 VDO 960 1400 mV IOUT = 150 mA 6
Output current limit I(CL) 200 320 500 mA VOUT = 0.9 × VOUT(nom) 6
Ground pin current IGND 1.3 2.05 µA IOUT = 0 mA, VOUT ≤ 3.3 V 6
Start-up time tSTR 200 600 µs VOUT(nom) ≤ 3.3 V 6
Input voltage VIN 2.7 30 V 5
Output voltage VOUT 1.2 6.5 V 5
Enable voltage VEN 0 6.5 V 5
Operating junction temperature TJ -40 125 °C 5
Input voltage (absolute maximum) VIN -0.3 32 V with respect to GND 5
Enable voltage (absolute maximum) VEN -0.3 7 V with respect to GND 5
Output voltage (absolute maximum) VOUT -0.3 7 V with respect to GND 5
Operating junction temperature (absolute maximum) TJ -55 150 °C 5
Storage temperature Tstg -55 150 °C 5
Junction-to-ambient thermal resistance (DBV) RθJA 212.1 °C/W DBV package, 5 pins 5
Junction-to-case (top) thermal resistance (DBV) RθJC(top) 78.5 °C/W DBV package, 5 pins 5
Junction-to-board thermal resistance (DBV) RθJB 39.5 °C/W DBV package, 5 pins 5
Junction-to-top characterization parameter (DBV) ψJT 2.86 °C/W DBV package, 5 pins 5
Junction-to-board characterization parameter (DBV) ψJB 38.7 °C/W DBV package, 5 pins 5

CAD (KiCad official)

  • Symbol: TPS70933DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps70933dbvr-etched.step / tps70933dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps70933dbvr.step / tps70933dbvr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tps70933dbvr.step 85 KB You want the bare part, or you mark your own boards.
tps70933dbvr-etched.step 2.5 MB You want the part with TPS70933DBVR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 588 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 e296f2d753ea26c4, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF