component

TPS70612DRVR

Public Made by Adom

by adom

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs tps70612drvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers tps70612drvr: viewers · Ray 9d ago
package.json Publish 0.1.0 · Ray 9d ago
page.json Set visibility: public · Ray 9d ago
README.md Initial commit: component/tps70612drvr · Ray 9d ago
tps70612drvr-etched.fit.json tps70612drvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tps70612drvr-etched.glb tps70612drvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tps70612drvr-etched.step tps70612drvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tps70612drvr.glb Publish 0.1.0 · Ray 9d ago
tps70612drvr.kicad_mod Publish 0.1.0 · Ray 9d ago
tps70612drvr.kicad_sym Publish 0.1.0 · Ray 9d ago
tps70612drvr.lbr Publish 0.1.0 · Ray 9d ago
tps70612drvr.step Publish 0.1.0 · Ray 9d ago

TPS70612DRVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)

TPS70612DRVR from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated output voltage; connect minimum 2.2-µF ceramic capacitor to ground for stability.
2 NC unconnected No internal connection.
3 GND power_in Ground connection.
4 EN input Enable pin; drive above 0.9 V to enable device, below 0.4 V for shutdown, or leave floating; maximum voltage 6.5 V.
5 NC unconnected No internal connection.
6 IN power_in Unregulated input supply voltage; input voltage range 2.7 V to 6.5 V.
7 Thermal pad power_in Thermal pad electrically connected to ground; connect to GND plane for improved thermal performance.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6-EP(2x2)
Category Power Management (PMIC)
Pins 7

CAD (KiCad official)

  • Symbol: TPS70612DRVR
  • Footprint: Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
  • 3D model files: tps70612drvr-etched.step / tps70612drvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps70612drvr.step / tps70612drvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 cca0ee52828baf76, retrieved 2026-09-27, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF