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TPS65300QRHFRQ1

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Texas Instruments DC-DC Converters, VQFN-24-EP(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS65300QRHFRQ1

Texas Instruments · DC-DC Converters · VQFN-24-EP(4x5)

TPS65300QRHFRQ1 from Texas Instruments, in a VQFN-24-EP(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT passive External bootstrap capacitor connected between BOOT and PH pins to provide voltage supply for internal high-side MOSFET gate drive, recharged on every recirculation cycle or approximately every fifth cycle at 100% duty cycle.
2 VIN power_in Unregulated input power supply with operating voltage range 5.6V to 40V (absolute maximum 45V transient), must be externally connected to VIN_D pin 24.
3 IGN_EN input High-voltage tolerant ignition enable input with operating range 0V to 40V (absolute maximum 45V), internally pulled to ground, must be externally pulled high to enable device operation.
4 BOOT_LDO passive External capacitor connection to ground for stabilization of internal regulated boot supply LDO that refreshes bootstrap capacitor every switching cycle.
5 NC unconnected No connection pin; leave open or connect to ground.
6 RT/CLK bidirectional External resistor connection to ground that programs buck converter switching frequency in range 2MHz to 3MHz, or alternatively accepts external clock input to synchronize switching frequency.
7 EN input Logic-level enable input with operating voltage range 0V to 5.25V, internally pulled to ground, device disabled when this pin is low.
8 5V power_out Regulated 5V output supply requiring low-ESR ceramic capacitor to ground for loop stabilization and to prevent output voltage droop during load transients.
9 IGN_ST tri_state Active-low open-drain ignition status output with maximum voltage 5.5V; asserted low when IGN_EN input is low or open, must be connected to external bias voltage through resistor.
10 GND power_in Signal ground reference pin internally connected to exposed thermal pad; must be electrically connected to exposed pad and ground plane for proper thermal performance and current return paths.
11 NC unconnected No connection pin; leave open or connect to ground.
12 COMP output Error amplifier output with voltage range 0V to 7V used to connect external compensation network components for voltage-mode control loop.
13 VSENSE input Inverting input node of error amplifier with voltage range 0V to 5.5V; forms voltage-sense network with internal resistors to VREG output and compared against internal 2V reference.
14 1.2VSENSE input Voltage sense node for 1.234V supply with operating range 0V to 5.5V; initiates current foldback to limit short-circuit current when voltage drops to approximately 0.6V.
15 1.2VDRIVE output Output current source with voltage range 0V to 8V for driving base of external bipolar transistor to regulate 1.234V supply; current limiting protects pin on both source and sink.
16 3.3VSENSE input Voltage sense node for 3.3V supply with operating range 0V to 5.5V; initiates current foldback to limit short-circuit current when voltage drops to approximately 1.65V.
17 3.3VDRIVE output Output current source with voltage range 0V to 8V for driving base of external bipolar transistor to regulate 3.3V supply; current limiting protects pin on both source and sink.
18 SS passive External ceramic capacitor connection to ground that programs soft-start timing for buck regulator; charged by internal 50µA typical pull-up current source activated on IGN_EN rising edge.
19 DELAY passive External capacitor connection to ground that programs power-on-reset delay time; charged by internal source current once VREG, 3.3V, and 1.234V supplies all exceed 90% of regulated values.
20 VREG power_out Buck converter pre-regulator output at fixed 5.3V; requires ceramic capacitor (4.7µF to 10µF) to ground to ensure output voltage does not drop below reset threshold during load transients.
21 nRST tri_state Active-low open-drain reset output with maximum voltage 5.5V; asserted low until VREG, 3.3V, and 1.234V outputs reach regulation and power-on delay timer expires, must be connected to external bias voltage through resistor.
22 PGND power_in Power ground reference pin internally connected to exposed thermal pad; must be electrically connected to exposed pad and ground plane for proper thermal performance and current return paths.
23 PH output Phase node output with voltage range -1V to 45V providing floating voltage reference for internal high-side MOSFET gate-drive circuitry in buck converter.
24 VIN_D power_in Drain input for internal high-side MOSFET with operating voltage range 5.6V to 40V (absolute maximum 45V transient); must be externally connected to VIN pin 2.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x5)
Category Power Management (PMIC)
Pins 25

CAD (KiCad official)

  • Symbol: TPS65300QRHFRQ1
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x5mm_P0.5mm_EP2.65x3.65mm
  • 3D model: VQFN-24-EP(4x5) (KiCad packages3D, STEP)
  • 3D model files: tps65300qrhfrq1-etched.step / tps65300qrhfrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps65300qrhfrq1.step / tps65300qrhfrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 465d2056696ae9a5, retrieved 2026-10-05, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF