component

TPS65279RHHR

Public Made by Adom

by adom

Texas Instruments DC-DC Converters, VQFN-36-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps65279rhhrfactory-2.0.0extractor-text
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TPS65279RHHR

Texas Instruments · DC-DC Converters · VQFN-36-EP(6x6)

TPS65279RHHR from Texas Instruments, in a VQFN-36-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PVIN2 power_in Power input supplying the power switches of converter 2 (buck2).
2 PVIN2 power_in Power input supplying the power switches of converter 2 (buck2).
3 ISHARE input Logic pin selecting current-sharing mode: tie high to parallel the two buck converters (buck1 is used), tie low for separate operation.
4 MODE input Ground connection forces continuous conduction mode (CCM); connection to V7V enables pulse-skipping mode (PSM) at light load.
5 V7V power_out Internal LDO output regulating to a typical 6.3 V for driver and control circuits; decouple to power ground with a minimum 1 µF ceramic capacitor, and V7V is slightly below VIN if VIN is lower than 6.3 V.
6 VIN power_in Supply input for the internal LDO and controllers, specified at 4.5 V to 18 V.
7 PVIN1 power_in Power input supplying the power switches of converter 1 (buck1).
8 PVIN1 power_in Power input supplying the power switches of converter 1 (buck1).
9 PGND1 power_in Power ground of buck1; place the input capacitor ground as close as possible to this pin.
10 PGND1 power_in Power ground of buck1; place the input capacitor ground as close as possible to this pin.
11 PGND1 power_in Power ground of buck1; place the input capacitor ground as close as possible to this pin.
12 PGOOD1 output Open-drain power-good output for buck1 that goes high impedance when output is in range; a 100 kΩ pull-up resistor is recommended.
13 PGOOD2 output Open-drain power-good output for buck2 that goes high impedance when output is in range; a 100 kΩ pull-up resistor is recommended.
14 FB1 input Feedback sense input for buck1 output via resistor divider, with a 0.6 V ±1% reference; absolute maximum 3.6 V.
15 RLIM1 input Current-limit threshold set pin for buck1; a resistor to GND sets the overcurrent protection level.
16 BST1 power_out Bootstrap capacitor pin between BST1 and LX1 that supplies the high-side MOSFET gate drive; absolute maximum 7 V referenced to LX1.
17 LX1 output Switching node of buck1; absolute maximum −4.5 V to 23 V (transient below 20 ns).
18 LX1 output Switching node of buck1; absolute maximum −4.5 V to 23 V (transient below 20 ns).
19 LX1 output Switching node of buck1; absolute maximum −4.5 V to 23 V (transient below 20 ns).
20 SS1 passive Soft-start and tracking pin for buck1 whose external capacitor sets the reference rise time; voltage here overrides the internal reference, and in current-sharing use it serves as soft-start; absolute maximum 3.6 V.
21 COMP1 passive Error amplifier output and loop compensation pin for buck1; in current-sharing use it serves as the compensation pin; absolute maximum 3.6 V.
22 ROSC input Oscillator frequency programming pin set by an external resistor (200 kHz to 1.6 MHz); it synchronizes to an external clock when one is applied.
23 AGND power_in Analog ground of the controllers; must be tied to power ground at a single point at the V7V capacitor return per the layout guidance.
24 COMP2 passive Error amplifier output and loop compensation pin for buck2; float this pin in current-sharing mode; absolute maximum 3.6 V.
25 SS2 passive Soft-start and tracking pin for buck2 whose external capacitor sets the reference rise time; float this pin in current-sharing mode; absolute maximum 3.6 V.
26 LX2 output Switching node of buck2; absolute maximum −4.5 V to 23 V (transient below 20 ns).
27 LX2 output Switching node of buck2; absolute maximum −4.5 V to 23 V (transient below 20 ns).
28 LX2 output Switching node of buck2; absolute maximum −4.5 V to 23 V (transient below 20 ns).
29 BST2 power_out Bootstrap capacitor pin between BST2 and LX2 that supplies the high-side MOSFET gate drive; absolute maximum 7 V referenced to LX2.
30 RLIM2 input Current-limit threshold set pin for buck2; a resistor to GND sets the overcurrent protection level.
31 FB2 input Feedback sense input for buck2 output via resistor divider, with a 0.6 V ±1% reference; connect to ground in current-sharing mode; absolute maximum 3.6 V.
32 EN1 input Enable pin for buck1 that also sets input undervoltage lockout via two resistors; enable voltage range 0 V to 6 V.
33 EN2 input Enable pin for buck2 that also sets input undervoltage lockout via two resistors; enable voltage range 0 V to 6 V.
34 PGND2 power_in Power ground of buck2; place the input capacitor ground as close as possible to this pin.
35 PGND2 power_in Power ground of buck2; place the input capacitor ground as close as possible to this pin.
36 PGND2 power_in Power ground of buck2; place the input capacitor ground as close as possible to this pin.
37 Thermal Pad power_in Exposed thermal pad connected to power ground that must be soldered to the board with as many vias as possible; no electrical signal is bonded to it inside the package.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-36-EP(6x6)
Category Power Management (PMIC)
Pins 37

CAD (KiCad official)

  • Symbol: TPS65279RHHR
  • Footprint: Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm
  • 3D model: VQFN-36-EP(6x6) (KiCad packages3D, STEP)
  • 3D model files: tps65279rhhr-etched.step / tps65279rhhr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps65279rhhr.step / tps65279rhhr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 f4d0f302ae36ca39, retrieved 2026-10-07, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF