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TPS65186RGZT
Public Made by Adomby adom
Texas Instruments Power Management - Specialized, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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PCB Footprint
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Datasheet
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Contents
README
markdownTPS65186RGZT
Texas Instruments · Power Management - Specialized · VQFN-48-EP(7x7)
TPS65186RGZT from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VREF | power_in | Filter pin for the 2.25-V internal reference to the ADC. |
| 2 | nINT | output | Open-drain interrupt pin, active low; its voltage is limited to 3.6 V absolute maximum. |
| 3 | VNEG | output | Negative supply output pin for the panel source drivers, from LDO2 at -15 V and 120 mA. |
| 4 | VNEG_IN | input | Input pin for LDO2 (VNEG), with a maximum voltage of 0.3 V. |
| 5 | WAKEUP | input | Active-high wake-up pin that wakes the device from sleep mode and has 93.75-us deglitch; I2C commands are accepted after it is pulled high but rails stay disabled until PWRUP is high. |
| 6 | DGND | power_in | Digital ground that must be connected to the ground plane. |
| 7 | INT_LDO | output | Filter pin for the 2.7-V internal supply. |
| 8 | AGND1 | power_in | Analog ground for general analog circuitry. |
| 9 | N/C | unconnected | Not internally connected. |
| 10 | VIN | power_in | Input power supply to general circuitry, specified 3 V to 6 V. |
| 11 | N/C | unconnected | Not internally connected. |
| 12 | VCOM_CTRL | input | VCOM enable pin; pulling it high enables the VCOM amplifier and pulling it low with VN enabled enables VCOM discharge, with 62.52-us deglitch. |
| 13 | N/C | unconnected | Not internally connected. |
| 14 | VCOM | input | Filter pin for the panel common-voltage driver. |
| 15 | N/C | unconnected | Not internally connected. |
| 16 | VCOM_PWR | input | Internal supply input to the VCOM buffer, to be connected to the output of DCDC2; absolute range -20 V to 0.3 V. |
| 17 | SCL | input | Serial interface (I2C) clock input. |
| 18 | SDA | bidirectional | Serial interface (I2C) data input and output. |
| 19 | N/C | unconnected | Not internally connected. |
| 20 | N/C | unconnected | Not internally connected. |
| 21 | N/C | unconnected | Not internally connected. |
| 22 | PWRUP | input | Power-up pin; pull high to power up all output rails, with 0 ns deglitch. |
| 23 | PBKG | passive | Die substrate that must be connected to VN (-16 V) with a short, wide trace to improve heat dissipation. |
| 24 | PWR_GOOD | output | Open-drain power-good output that is pulled low when one or more rails are disabled or out of regulation. |
| 25 | VN_SW | output | Inverting buck-boost converter (DCDC2) switch output. |
| 26 | N/C | unconnected | Not internally connected. |
| 27 | VIN_P | input | Input power supply to the inverting buck-boost converter (DCDC2), specified 3 V to 6 V. |
| 28 | VN | input | Feedback pin for the inverting buck-boost converter (DCDC2) and supply for the VNEG LDO and VEE charge pump, operating at -16 V. |
| 29 | VEE_IN | input | Input supply pin for the negative charge pump CP2 (VEE). |
| 30 | VEE_DRV | output | Driver output pin for the negative charge pump CP2, rated to -20 V and 12 mA. |
| 31 | VEE_D | input | Base voltage output pin for the negative charge pump CP2. |
| 32 | VEE_FB | input | Feedback pin for the negative charge pump CP2, with a maximum of 3.6 V. |
| 33 | PGND2 | power_in | Power ground for the CP1 (VDDH) and CP2 (VEE) charge pumps. |
| 34 | VDDH_FB | input | Feedback pin for the positive charge pump CP1, with a maximum of 3.6 V. |
| 35 | VDDH_D | output | Base voltage output pin for the positive charge pump CP1. |
| 36 | VDDH_DRV | output | Driver output pin for the positive charge pump CP1, rated to 22 V and 10 mA. |
| 37 | VDDH_IN | input | Input supply pin for the positive charge pump CP1, with a maximum of 20 V. |
| 38 | N/C | unconnected | Not internally connected. |
| 39 | N/C | unconnected | Not internally connected. |
| 40 | VB_SW | output | Boost converter switch output for DCDC1, with a maximum of 20 V. |
| 41 | PGND1 | power_in | Power ground for DCDC1. |
| 42 | VB | power_in | Feedback pin for the boost converter DCDC1 and supply for the VPOS LDO and VDDH charge pump, with a maximum of 20 V. |
| 43 | VPOS_IN | input | Input pin for LDO1 (VPOS), with a maximum of 20 V. |
| 44 | VPOS | output | Positive supply output pin for the panel source drivers, from LDO1 at 15 V and 120 mA. |
| 45 | VIN3P3 | input | Input pin to the 3.3-V power switch. |
| 46 | V3P3 | output | Output pin of the 3.3-V power switch, rated 10 ohm. |
| 47 | TS | input | Thermistor input; connect a 10-kOhm NTC thermistor and a 43-kOhm linearization resistor between this pin and AGND. |
| 48 | AGND2 | power_in | Reference point for the external thermistor and linearization resistor. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-48-EP(7x7) |
| Category | Power Management (PMIC) |
| Pins | 49 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage at VIN, VIN_P, VIN3P3 | VIN | -0.3 | 7 | V | 5 | ||
| Ground pins to system ground | -0.3 | 0.3 | V | 5 | |||
| Voltage at SDA, SCL, WAKEUP, PWRUP, VCOM_CTRL, VDDH_FB, VEE_FB, PWR_GOOD, nINT | -0.3 | 3.6 | V | 5 | |||
| Voltage on VB, VB_SW, VPOS_IN, VDDH_IN | -0.3 | 20 | V | 5 | |||
| Voltage on VN, VEE_IN, VCOM_PWR, VNEG_IN | -20 | 0.3 | V | 5 | |||
| Voltage from VIN_P to VN_SW | -0.3 | 30 | V | 5 | |||
| Operating junction temperature | TJ | -10 | 125 | °C | 5 | ||
| Operating ambient temperature | TA | -10 | 85 | °C | 5 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Input voltage at VIN, VIN_P, VIN3P3 | VIN | 3 | 3.7 | 6 | V | 5 | |
| Voltage at SDA, SCL, WAKEUP, PWRUP, VCOM_CTRL, VDDH_FB, VEE_FB, PWR_GOOD, nINT | 0 | 3.6 | V | 5 | |||
| Operating ambient temperature | TA | -10 | 85 | °C | 5 | ||
| Operating junction temperature | TJ | -10 | 125 | °C | 5 | ||
| Input voltage range | VIN | 3 | 3.7 | 6 | V | 6 | |
| Shutdown current | ISLEEP | 3.5 | 10 | µA | Device in sleep mode | 6 | |
| Nominal output capacitor (internal supply) | CINT_LDO | 1 | 4.7 | µF | Capacitor tolerance ±10% | 6 | |
| Nominal output capacitor (VREF) | CREF | 3.3 | 4.7 | µF | Capacitor tolerance ±10% | 6 | |
| DCDC1 VOUT DC set tolerance | VOUT | -4.5 | 4.5 | % | 6 | ||
| DCDC1 switch current accuracy | ILIMIT | -30 | 30 | % | 6 | ||
| DCDC2 VOUT DC set tolerance | VOUT | -4.5 | 4.5 | % | 7 | ||
| DCDC2 switch current accuracy | ILIMIT | -30 | 30 | % | 7 | ||
| LDO1 (VPOS) input voltage range | VPOS_IN | 15.2 | 16 | 16.8 | V | 7 | |
| LDO1 output voltage set value | VSET | 14.25 | 15 | 15 | V | VIN = 16 V, VSET[2:0] = 0x3h to 0x6h | 7 |
| LDO1 output tolerance | VOUTTOL | -1 | 1 | % | VSET = 15 V, ILOAD = 20 mA | 7 | |
| LDO2 (VNEG) output voltage set value | VSET | -15 | -15 | -14.25 | V | VIN = -16 V, VSET[2:0] = 0x3h to 0x6h | 7 |
| LDO2 output tolerance | VOUTTOL | -1 | 1 | % | VSET = -15 V, ILOAD = -20 mA | 7 | |
| Difference between VPOS and VNEG | VDIFF | -50 | 50 | mV | VSET = ±15 V, ILOAD = ±20 mA, 0°C to 60°C | 8 | |
| VCOM allowed operating range | -5.5 | 1 | V | Outside this range VCOM is shut down and VCOMF interrupt is set | 8 | ||
| VCOM accuracy | -0.8 | 0.8 | % | VCOM[8:0] = 0x07Dh (-1.25 V), VIN = 3.4 V to 4.2 V, no load | 8 | ||
| VCOM accuracy | -1.5 | 1.5 | % | VCOM[8:0] = 0x07Dh (-1.25 V), VIN = 3 V to 6 V, no load | 8 | ||
| VCOM output voltage range | -5.11 | 0 | V | 8 | |||
| VCOM nominal output capacitor | CVCOM | 3.3 | 4.7 | µF | Capacitor tolerance ±10% | 8 | |
| CP1 (VDDH) input voltage range | VDDH_IN | 15.2 | 16 | 16.8 | V | 8 | |
| CP1 feedback voltage accuracy | VFB | -2 | 2 | % | ILOAD = 2 mA | 8 | |
| CP1 (VDDH) output voltage range | VDDH_OUT | 21 | 22 | 23 | V | VSET = 22 V, ILOAD = 2 mA | 8 |
| CP2 feedback voltage accuracy | VFB | -2 | 2 | % | ILOAD = 2 mA | 8 | |
| CP2 (VEE) output voltage range | VEE_OUT | -21 | -20 | -19 | V | VSET = -20 V, ILOAD = 3 mA | 8 |
| Discharge impedance to ground | RDIS | 800 | 1000 | 1200 | Ω | V3P3EN = 0 | 9 |
| Accuracy of thermistor monitor temperature to voltage | TMSTTOL | -1 | 1 | LSB | Not tested in production | 9 | |
| Oscillator frequency accuracy | -10 | 10 | % | TA = -40°C to 85°C | 9 | ||
| Internal supply | VREF | 2.25 | V | 6 | |||
| Internal supply | VINT_LDO | 2.7 | V | 6 | |||
| Operating quiescent current into VIN | IQ | 5.5 | mA | Device switching, no load | 6 | ||
| Operating quiescent current into VIN | ISTD | 130 | µA | Device in standby mode | 6 | ||
| Undervoltage lockout hysteresis | VHYS | 400 | mV | VIN rising | 6 | ||
| DCDC1 output voltage range | VOUT | 16 | V | 6 | |||
| DCDC2 output voltage range | VOUT | -16 | V | 7 | |||
| DCDC1 output current | IOUT | 250 | mA | 6 | |||
| DCDC1 MOSFET ON-resistance | RDS(ON) | 350 | mΩ | VIN = 3.7 V | 6 | ||
| DCDC1 output capacitor ESR | ESR | 20 | mΩ | 6 | |||
| DCDC1 switching frequency | fSW | 1 | MHz | 6 | |||
| VCOM drive current | IVCOM | 15 | mA | 8 | |||
| VCOM output impedance | ROUT | 5 | Ω | VCOM_CTRL = high, Hi-Z = 0 | 8 | ||
| Junction-to-ambient thermal resistance | RθJA | 30 | °C/W | 6 | |||
| Junction-to-board thermal resistance | RθJB | 6.6 | °C/W | 6 | |||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 0.9 | °C/W | 6 | |||
| CP1 load current range | ILOAD | 10 | mA | 8 | |||
| CP2 load current range | ILOAD | 12 | mA | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | PWRUP pin is pulled high. (3) PowerPad, internally connected to PBKG. Connect to VN with short, wide trace. Wide PowerPad, , copper trace will improve heat dissipation. PowerPad must not be connected | 4 |
CAD (KiCad official)
- Symbol:
TPS65186RGZT - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files:
tps65186rgzt-etched.step/tps65186rgzt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps65186rgzt.step/tps65186rgzt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (56 pp, sha256
ad97de5f2d5e85bc, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).