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TPS65178ARSLR

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Texas Instruments Power Management - Specialized, VQFN-48-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

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TPS65178ARSLR

Texas Instruments · Power Management - Specialized · VQFN-48-EP(6x6)

TPS65178ARSLR from Texas Instruments, in a VQFN-48-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT4 input Buck 4 converter (VEPI) output voltage sense pin.
2 SWB4 bidirectional Buck 4 converter (VEPI) switch pin.
3 RST output Reset generator open-drain output pin.
4 OUT1 input Buck 1 converter (VCC) output voltage sense pin; also the input pin for buck 2 and buck 4 converters.
5 OUT2 input Buck 2 converter (VCORE) output voltage sense pin.
6 SWB2 bidirectional Buck 2 converter (VCORE) switch pin.
7 PGND2 power_in Buck 2 converter (VCORE) power ground pin.
8 SWB1 bidirectional Buck 1 converter (VCC) switch pin; pin 8 is bonded together with pin 9.
9 SWB1 bidirectional Buck 1 converter (VCC) switch pin; pin 9 is bonded together with pin 8.
10 NC unconnected Not connected.
11 PVINB1 power_in Buck 1 converter (VCC) input supply pin; pin 11 is bonded together with pin 12.
12 PVINB1 power_in Buck 1 converter (VCC) input supply pin; pin 12 is bonded together with pin 11.
13 AVIN power_in Internal regulator supply pin; recommended operating input range is 8.6 V to 14.7 V.
14 PVINB3 power_in Buck 3 converter (HVDD) power input pin.
15 SWB3 bidirectional Buck 3 converter (HVDD) switch pin.
16 OUT3 input Buck 3 converter (HVDD) output voltage sense pin.
17 PGND3 power_in Buck 3 converter (HVDD) power ground pin.
18 PGND power_in Boost converter (VDD) power ground pin; pin 18 is bonded together with pin 19.
19 PGND power_in Boost converter (VDD) power ground pin; pin 19 is bonded together with pin 18.
20 SW bidirectional Boost converter (VDD) switch pin; pin 20 is bonded together with pin 21.
21 SW bidirectional Boost converter (VDD) switch pin; pin 21 is bonded together with pin 20.
22 SWI input Isolation switch input pin, connected to the internal overvoltage protection comparator of the boost converter.
23 SWO output Isolation switch output pin (VDD).
24 AGND power_in Analog ground pin; connect this pin to the PowerPAD (exposed pad).
25 SS output Boost converter (VDD) soft-start pin; connect a capacitor here if soft-start is needed, open means no soft-start.
26 COMP bidirectional Boost converter (VDD) compensation pin.
27 SCL bidirectional I2C clock pin; input thresholds are VIH2 = 2 V minimum and VIL2 = 0.8 V maximum for AVIN = 8.6 V to 14.7 V.
28 SDA bidirectional I2C data pin; input thresholds are VIH2 = 2 V minimum and VIL2 = 0.8 V maximum for AVIN = 8.6 V to 14.7 V.
29 VL power_out Internal regulator output pin (nominally 5.0 V with no load); connect an output capacitor to this pin.
30 TCOMP input Temperature compensation input pin; connect the thermistor / pull-up resistor network to this pin.
31 CTRLP output Positive charge pump (VGH) base drive signal pin.
32 VGH input Positive charge pump (VGH) output voltage sense pin.
33 SWP bidirectional Positive charge pump (VGH) switch pin.
34 SWN bidirectional Negative charge pump (VGL) switch pin.
35 VGL input Negative charge pump (VGL) output voltage sense pin.
36 CTRLN output Negative charge pump (VGL) base drive signal pin.
37 GMA1 output Gamma buffer 1 output pin (DAC output).
38 GMA2 output Gamma buffer 2 output pin (DAC output).
39 GMA3 output Gamma buffer 3 output pin (DAC output).
40 GMA4 output Gamma buffer 4 output pin (DAC output).
41 GMA5 output Gamma buffer 5 output pin (DAC output).
42 GMA6 output Gamma buffer 6 output pin (DAC output).
43 VCOM input VCOM output sense pin.
44 NEG output VCOM inverting pin.
45 POS output VCOM non-inverting pin; DAC output for the VCOM reference.
46 VCOMFB input VCOM panel feedback pin.
47 DYN input Dynamic VCOM gain select pin; with fixed gain it can be left floating or connected to GND.
48 PGND4 power_in Buck 4 converter (VEPI) power ground pin.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-48-EP(6x6)
Category Power Management (PMIC)
Pins 49

CAD (KiCad official)

  • Symbol: TPS65178ARSLR
  • Footprint: Package_DFN_QFN:QFN-48-1EP_6x6mm_P0.4mm_EP4.4x4.4mm
  • 3D model: VQFN-48-EP(6x6), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tps65178arslr-etched.step / tps65178arslr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps65178arslr.step / tps65178arslr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (61 pp, sha256 ffafe4d0d4361b46, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF