component
TPS65161APWPR
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Texas Instruments Power Management - Specialized, HTSSOP-28-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+65@@ -0,0 +1,65 @@+# TPS65161APWPR++**Texas Instruments** · Power Management - Specialized · HTSSOP-28-EP++TPS65161APWPR from Texas Instruments, in a HTSSOP-28-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | FB | input | Feedback of the main boost converter generating Vsource (VS). |+| 2 | COMP | output | Compensation pin for the main boost converter; connect a capacitor and, if required, a resistor to this pin for frequency compensation. |+| 3 | OS | input | Output sense pin for the boost converter overvoltage protection; must be connected to boost converter output with a 470-nF capacitor to GND; use wide PCB trace due to high current. |+| 4 | SW | output | Switch pin of the boost converter generating Vsource (VS). |+| 5 | SW | output | Switch pin of the boost converter generating Vsource (VS). |+| 6 | PGND | power_in | Power ground. |+| 7 | PGND | power_in | Power ground. |+| 8 | SUP | power_in | Supply pin of the positive charge pump driver; can be connected to VIN or the main boost converter output VS depending on the desired output voltage VGH. |+| 9 | EN2 | input | Enable pin of the boost converter and positive charge pump; logic high enables the device after the buck converter is within regulation and delay time DLY2. |+| 10 | DRP | output | Drive pin of the positive charge pump. |+| 11 | DRN | output | Drive pin of the negative charge pump. |+| 12 | FREQ | input | Frequency adjust pin; logic low sets 500 kHz switching frequency and logic high sets 750 kHz switching frequency. |+| 13 | FBN | input | Feedback pin of negative charge pump. |+| 14 | FBP | input | Feedback pin of positive charge pump. |+| 15 | FBB | input | Feedback pin of the buck converter. |+| 16 | EN1 | input | Enable pin of the buck converter and negative charge pump; logic high enables the device and after delay time DLY1, the negative charge pump starts. |+| 17 | BOOT | output | N-channel MOSFET gate drive voltage for the buck converter; connect a capacitor from the switch node SWB to this pin. |+| 18 | SWB | output | Switch pin of the buck converter. |+| 19 | NC | unconnected | Not connected. |+| 20 | VINB | power_in | Power input voltage pin for the buck converter. |+| 21 | VINB | power_in | Power input voltage pin for the buck converter. |+| 22 | AVIN | power_in | Analog input voltage for the analog circuits; bypass with a 1-μF ceramic capacitor for filtering. |+| 23 | GND | power_in | Analog ground. |+| 24 | REF | output | Internal reference voltage output of 1.213 V typical; connect a 220-nF capacitor to this pin. |+| 25 | DLY1 | output | Delay timing pin; connecting a capacitor from this pin to GND sets the delay time between V(LOGIC) and VGL during start-up. |+| 26 | DLY2 | output | Delay timing pin; connecting a capacitor from this pin to GND sets the delay time between V(LOGIC) and VS/VGH during start-up. |+| 27 | GD | tri_state | Gate drive pin for external MOSFET isolation switch; open-drain output latched low when boost converter is within 8% of regulation; goes high impedance when EN2 is cycled low. |+| 28 | SS | output | Soft-start timing pin; connect a 22-nF capacitor to this pin to set the soft-start time for the boost converter. |+| 29 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-28-EP |+| Category | Power Management (PMIC) |+| Pins | 29 |++## CAD (KiCad official)++- Symbol: `TPS65161APWPR`+- Footprint: `Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm`+- 3D model: HTSSOP-28-EP (KiCad packages3D, STEP)+- 3D model files: `tps65161apwpr-etched.step` / `tps65161apwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps65161apwpr.step` / `tps65161apwpr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps65161) (36 pp, sha256 `a7de02a273004393`, retrieved 2026-10-06, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps65161apwpr-datasheet.pdf)
page.jsonadded+286@@ -0,0 +1,286 @@+{+ "slug": "tps65161apwpr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Power Management - Specialized, HTSSOP-28-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps65161apwpr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps65161apwpr.kicad_sym",+ "tps65161apwpr.kicad_mod",+ "tps65161apwpr.glb",+ "tps65161apwpr.step",+ "tps65161apwpr.lbr",+ "docs/hero.png",+ "docs/tps65161apwpr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps65161apwpr-hero.glb",+ "tps65161apwpr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS65161APWPR",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-28-EP",+ "pin_count": 29,+ "category": "Power Management (PMIC)",+ "subcategory": "Power Management - Specialized",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps65161",+ "parts": {+ "symbol": "tps65161apwpr.kicad_sym",+ "footprint": "tps65161apwpr.kicad_mod",+ "model_3d": "tps65161apwpr-hero.glb",+ "model_3d_plain": "tps65161apwpr.glb",+ "model_3d_step": "tps65161apwpr-etched.step",+ "model_3d_step_plain": "tps65161apwpr.step",+ "lbr": "tps65161apwpr.lbr"+ },+ "distributor_links": {+ "lcsc": 2155953,+ "digikey": "296-22678-2-ND",+ "mouser": "595-TPS65161APWPR"+ },+ "distributor_check": {+ "checked_at": "2026-10-06T01:26:16Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-22678-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS65161APWPR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "FB",+ "type": "input",+ "description": "Feedback of the main boost converter generating Vsource (VS)."+ },+ {+ "number": "2",+ "name": "COMP",+ "type": "output",+ "description": "Compensation pin for the main boost converter; connect a capacitor and, if required, a resistor to this pin for frequency compensation."+ },+ {+ "number": "3",+ "name": "OS",+ "type": "input",+ "description": "Output sense pin for the boost converter overvoltage protection; must be connected to boost converter output with a 470-nF capacitor to GND; use wide PCB trace due to high current."+ },+ {+ "number": "4",+ "name": "SW",+ "type": "output",+ "description": "Switch pin of the boost converter generating Vsource (VS)."+ },+ {+ "number": "5",+ "name": "SW",+ "type": "output",+ "description": "Switch pin of the boost converter generating Vsource (VS)."+ },+ {+ "number": "6",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground."+ },+ {+ "number": "7",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground."+ },+ {+ "number": "8",+ "name": "SUP",+ "type": "power_in",+ "description": "Supply pin of the positive charge pump driver; can be connected to VIN or the main boost converter output VS depending on the desired output voltage VGH."+ },+ {+ "number": "9",+ "name": "EN2",+ "type": "input",+ "description": "Enable pin of the boost converter and positive charge pump; logic high enables the device after the buck converter is within regulation and delay time DLY2."+ },+ {+ "number": "10",+ "name": "DRP",+ "type": "output",+ "description": "Drive pin of the positive charge pump."+ },+ {+ "number": "11",+ "name": "DRN",+ "type": "output",+ "description": "Drive pin of the negative charge pump."+ },+ {+ "number": "12",+ "name": "FREQ",+ "type": "input",+ "description": "Frequency adjust pin; logic low sets 500 kHz switching frequency and logic high sets 750 kHz switching frequency."+ },+ {+ "number": "13",+ "name": "FBN",+ "type": "input",+ "description": "Feedback pin of negative charge pump."+ },+ {+ "number": "14",+ "name": "FBP",+ "type": "input",+ "description": "Feedback pin of positive charge pump."+ },+ {+ "number": "15",+ "name": "FBB",+ "type": "input",+ "description": "Feedback pin of the buck converter."+ },+ {+ "number": "16",+ "name": "EN1",+ "type": "input",+ "description": "Enable pin of the buck converter and negative charge pump; logic high enables the device and after delay time DLY1, the negative charge pump starts."+ },+ {+ "number": "17",+ "name": "BOOT",+ "type": "output",+ "description": "N-channel MOSFET gate drive voltage for the buck converter; connect a capacitor from the switch node SWB to this pin."+ },+ {+ "number": "18",+ "name": "SWB",+ "type": "output",+ "description": "Switch pin of the buck converter."+ },+ {+ "number": "19",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected."+ },+ {+ "number": "20",+ "name": "VINB",+ "type": "power_in",+ "description": "Power input voltage pin for the buck converter."+ },+ {+ "number": "21",+ "name": "VINB",+ "type": "power_in",+ "description": "Power input voltage pin for the buck converter."+ },+ {+ "number": "22",+ "name": "AVIN",+ "type": "power_in",+ "description": "Analog input voltage for the analog circuits; bypass with a 1-μF ceramic capacitor for filtering."+ },+ {+ "number": "23",+ "name": "GND",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "24",+ "name": "REF",+ "type": "output",+ "description": "Internal reference voltage output of 1.213 V typical; connect a 220-nF capacitor to this pin."+ },+ {+ "number": "25",+ "name": "DLY1",+ "type": "output",+ "description": "Delay timing pin; connecting a capacitor from this pin to GND sets the delay time between V(LOGIC) and VGL during start-up."+ },+ {+ "number": "26",+ "name": "DLY2",+ "type": "output",+ "description": "Delay timing pin; connecting a capacitor from this pin to GND sets the delay time between V(LOGIC) and VS/VGH during start-up."+ },+ {+ "number": "27",+ "name": "GD",+ "type": "tri_state",+ "description": "Gate drive pin for external MOSFET isolation switch; open-drain output latched low when boost converter is within 8% of regulation; goes high impedance when EN2 is cycled low."+ },+ {+ "number": "28",+ "name": "SS",+ "type": "output",+ "description": "Soft-start timing pin; connect a 22-nF capacitor to this pin to set the soft-start time for the boost converter."+ },+ {+ "number": "29",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 29 added from the footprint"+ ],+ "pages_sent": 9,+ "cost_usd": 0.1595,+ "at": "2026-10-06T01:26:02"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps65161",+ "pages": 36,+ "sha256": "a7de02a273004393",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 29,+ "described": 29,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}