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TPS65148RHBR

Texas Instruments · LCD Drivers · VQFN-32-EP(5x5)

TPS65148RHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REG_FB input Feedback input for the gamma voltage regulator LDO, which regulates VREG_FB to 1.240 V typical (1.228 V to 1.252 V over temperature).
2 REG_O output Output of the gamma buffer voltage regulator (VREG_O), specified from 7 V to 17.6 V.
3 REG_I input Input supply pin for the gamma voltage regulator, which must be supplied within the 7 V to 18 V recommended range.
4 SUP input Input supply for the gate voltage shaping and operational amplifier blocks, which also serves as the overvoltage protection sense pin and must be supplied by VS (7 V to 18 V).
5 OPO output Output of the VCOM buffer, which drives the LCD backplane with up to ±130 mA output current.
6 OPI input Non-inverting input of the VCOM buffer, which has a specified input common-mode range of 1 V to VS − 1.5 V.
7 OPGND power_in Analog ground for the VCOM buffer.
8 VFLK input Charge/discharge logic input for VGHM; driving it low discharges VGHM through the RE pin.
9 XAO output Open-drain reset output that is active low, requires an external pull-up, and can sink 1 mA when asserted.
10 VDET input Reset threshold sense input, where a voltage divider sets the input-voltage threshold for XAO, with the internal reference at 1.240 V typical.
11 HVS input High voltage stress logic input that enables the high voltage stress function when a high logic level is applied.
12 FREQ input Boost converter frequency select pin, where connecting FREQ to GND selects 630 kHz and connecting it to VIN selects 1.2 MHz.
13 EN input Shutdown control input, where a logic high voltage enables the device.
14 AGND power_in Analog ground, also connected to the exposed pad per the datasheet pin grouping.
15 VIN power_in Input supply pin, specified for 2.5 V to 6 V (absolute maximum −0.3 V to 6.5 V).
16 VIN power_in Input supply pin, specified for 2.5 V to 6 V (absolute maximum −0.3 V to 6.5 V).
17 GD output Gate driver output that connects to the gate of the external input-to-output isolation switch, with 5 kΩ internal pull-up and 10 mA sink current when enabled.
18 SW passive Boost converter switch pin driving the internal 4 A N-channel MOSFET, with current limit 4.0 A to 5.6 A.
19 SW passive Boost converter switch pin driving the internal 4 A N-channel MOSFET, with current limit 4.0 A to 5.6 A.
20 PGND power_in Power ground for the boost converter.
21 PGND power_in Power ground for the boost converter.
22 NC unconnected Not connected.
23 RHVS passive Voltage level set pin, where a resistor connected here sets the VS voltage when HVS is high.
24 FB input Boost converter feedback pin, regulated to 1.240 V typical (1.228 V to 1.252 V).
25 COMP bidirectional Boost converter compensation pin.
26 AGND power_in Analog ground.
27 SS bidirectional Boost soft-start control pin, where a capacitor sets the soft-start and leaving it open means no soft-start.
28 NC unconnected Not connected.
29 VDPM bidirectional Sets the delay before VGHM is enabled through an external capacitor, and the pin should float if no delay is needed.
30 VGH input Input for the positive charge pump voltage used by gate voltage shaping, specified from 15 V to 35 V.
31 VGHM output Gate voltage shaping output, which is modulated from VGH and is driven to VGH during power-off.
32 RE passive Slope adjustment pin for gate voltage shaping, where a resistor sets the VGHM discharge slope when VFLK is low.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-32-EP(5x5)
Category LED Drivers
Pins 33

CAD (KiCad official)

  • Symbol: TPS65148RHBR
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: tps65148rhbr-etched.step / tps65148rhbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps65148rhbr.step / tps65148rhbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 636ecec433bce25d, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF