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Contents

README

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TPS65146RGER

Texas Instruments · Power Management - Specialized · VQFN-24-EP(4x4)

TPS65146RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW output Switch node of boost converter with voltage rating up to 20 V and leakage current of 30 µA at VSW = 17 V.
2 VIN power_in Input supply pin with voltage range 2.5 to 6.0 V and operating quiescent current of 0.17 to 0.5 mA.
3 SS bidirectional Boost soft-start control pin with softstart current of 4 µA at VSS = 1.240 V.
4 AGND power_in Analog ground pin (exposed thermal pad).
5 ADJ input LDO feedback pin with feedback regulation voltage of 1.240 V and bias current of 0.1 µA.
6 LVOUT power_out LDO output pin with output voltage range 1.240 to 4 V and maximum short circuit current of 750 mA.
7 LVIN power_in LDO input supply pin with minimum dropout voltage of 280 mV at ILVOUT = 350 mA and 430 mV at 500 mA.
8 VDET input Reset function threshold pin with operating voltage range 1.6 to 6.0 V and threshold voltage of 1.100 V falling.
9 XAO output Reset function output pin (open-drain) with sink current capability of 1 mA at VXAO(ON) = 0.5 V.
10 CDET bidirectional Reset delay timing capacitor pin with charge current of 10 µA at VCDET ≤ 1.240 V.
11 VDPM bidirectional Gate voltage shaping delay timing capacitor pin with charge current of 20 µA.
12 VFLK input Logic input pin for charge/discharge signal with VIH of 2 V and VIL of 0.5 V.
13 RE input Gate voltage shaping slope adjustment resistor pin with M2 PMOS RDS(ON) of 13 to 25 Ω.
14 VGHM output Gate voltage shaping output pin with maximum output voltage of 20.5 V at TA = 85°C.
15 VGH power_in Positive charge pump input pin with voltage rating up to 35 V and operating quiescent current of 22 to 40 µA.
16 FBP input Positive charge pump feedback pin with feedback regulation voltage of 1.240 V and bias current of 0.1 µA.
17 DRVP output Positive charge pump driver output pin with Q1 PMOS RDS(ON) of 8 to 20 Ω and Q2 NMOS RDS(ON) of 2 to 6 Ω.
18 SUP power_in Voltage supply pin for gate voltage shaping and VCOM buffer with voltage range 7 to 16.5 V.
19 OPO output VCOM buffer output pin with output voltage swing high of VS − 0.65 to VS − 0.80 V.
20 OPI input VCOM buffer input pin with common mode input voltage range 2 to VS−2 V.
21 COMP bidirectional Boost converter compensation pin for external compensation network.
22 FB input Boost converter feedback pin with feedback regulation voltage of 1.240 V and bias current of 0.1 µA.
23 FREQ input Boost converter frequency select pin operating at 650 kHz when connected to GND and 1.2 MHz when connected to VIN.
24 PGND power_in Power ground pin.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category Power Management (PMIC)
Pins 25

CAD (KiCad official)

  • Symbol: TPS65146RGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: tps65146rger-etched.step / tps65146rger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps65146rger.step / tps65146rger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 de0fecb5c5c245b2, retrieved 2026-09-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF