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TPS65105RGER

Texas Instruments · LCD Drivers · VQFN-24-EP(4x4)

TPS65105RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COMP passive Compensation pin for the main boost converter, to which a small capacitor is connected.
2 ENR input Enable pin of the linear regulator controller; it must be terminated and not left floating, with logic high enabling the regulator and logic low putting it in shutdown.
3 EN input Enable pin of the device; it must be terminated and not left floating, with logic high enabling the device and logic low shutting it down.
4 FB1 input Feedback pin of the boost converter (VO1).
5 FB4 input Feedback pin of the linear regulator controller, which is set to a fixed output voltage of 3.3 V or 3 V depending on the version.
6 BASE output Base drive output for the external transistor; if the linear regulator is not needed, this pin should be pulled against VIN.
7 VIN power_in Input voltage pin of the device, with a recommended input range of 2.7 V to 5.8 V and an absolute maximum of 6 V.
8 SW passive Switch pin of the boost converter, with an absolute maximum voltage of 20 V on the SW pin.
9 SW passive Switch pin of the boost converter, with an absolute maximum voltage of 20 V on the SW pin.
10 PGND power_in Power ground, to which the PowerPAD or exposed thermal die must be connected.
11 PGND power_in Power ground, to which the PowerPAD or exposed thermal die must be connected.
12 SUP power_in Supply pin of the positive and negative charge pumps, boost converter gate drive circuit and VCOM buffer; it must be connected to the output of the main boost converter and cannot be connected to any other voltage source.
13 VCOM output VCOM buffer output.
14 VCOMIN input Positive input terminal of the VCOM buffer; when the VCOM buffer is not used, it can be connected to GND to reduce the overall quiescent current of the IC.
15 FB3 input Feedback pin of the positive charge pump.
16 OUT3 output Positive charge pump output (VO3), with an absolute maximum voltage of 30 V.
17 C2+ passive Positive terminal of the charge pump flying capacitor; this pin should be left open if the device runs in voltage doubler mode.
18 C2-/MODE passive Negative terminal of the charge pump flying capacitor and charge pump MODE pin; a flying capacitor connected here gives voltage tripler mode, while for doubler mode the capacitor is removed and this pin is connected to GND.
19 C1+ passive Positive terminal of the charge pump flying capacitor.
20 C1- passive Negative terminal of the charge pump flying capacitor.
21 DRV output External charge pump driver output, with an absolute maximum voltage of 15 V.
22 GND power_in Ground.
23 REF output Internal reference output, typically 1.23 V.
24 FB2 input Feedback pin of the negative charge pump.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category LED Drivers
Pins 25

CAD (KiCad official)

  • Symbol: TPS65105RGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: tps65105rger-etched.step / tps65105rger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps65105rger.step / tps65105rger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 2bf67383027da5b0, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF