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TPS65070RSLR
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Texas Instruments Battery Management ICs, VQFN-48-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS65070RSLR
Texas Instruments · Battery Management ICs · VQFN-48-EP(6x6)
TPS65070RSLR from Texas Instruments, in a VQFN-48-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AVDD6 | power_out | Internal always-on voltage; connect a 4.7-µF capacitor from this pin to GND. |
| 2 | VLDO2 | power_out | Output voltage of LDO2. |
| 3 | VINLDO1/2 | power_in | Input voltage for LDO1 and LDO2. |
| 4 | VLDO1 | power_out | Output voltage of LDO1. |
| 5 | BAT | power_out | Charger power stage output; connect to battery with 10 µF ceramic capacitor to GND. |
| 6 | BAT | power_out | Charger power stage output; connect to battery with 10 µF ceramic capacitor to GND. |
| 7 | SYS | power_out | System voltage output of the power path manager; all voltage regulators are typically powered from this output. |
| 8 | SYS | power_out | System voltage output of the power path manager; all voltage regulators are typically powered from this output. |
| 9 | ISET | input | Connect a resistor from ISET to GND to set the charge current. |
| 10 | AC | power_in | Input power for power path manager; connect to external DC supply with 1 µF minimum capacitor to GND. |
| 11 | TS | input | Temperature sense input; connect to NTC thermistor to sense battery pack temperature. |
| 12 | USB | power_in | Input power for power path manager from USB port; connect 1 µF minimum capacitor to GND with 500 mA maximum default input current limit. |
| 13 | POWER_ON | input | Power_ON input for internal state machine; must be pulled HIGH by application processor to keep system ON when PB_IN is released. |
| 14 | EN_DCDC1 | input | Enable input for DCDC1, active high. |
| 15 | EN_DCDC2 | input | Enable input for DCDC2, active high. |
| 16 | EN_DCDC3 | input | Enable input for DCDC3, active high. |
| 17 | DEFDCDC3 | input | Select pin of DCDC3 output voltage. |
| 18 | DEFDCDC2 | input | Select pin of DCDC2 output voltage. |
| 19 | VDCDC1 | input | Feedback voltage sense input; for fixed voltage option connect directly to Vout1, for adjustable version connect to external resistor divider. |
| 20 | L1 | output | Switch pin for DCDC1; connect to inductor. |
| 21 | VINDCDC1/2 | power_in | Input voltage for DCDC1 and DCDC2 step-down converter; must be connected to SYS pin. |
| 22 | L2 | output | Switch pin of DCDC2; connect to inductor. |
| 23 | VDCDC2 | input | Feedback voltage sense input; connect directly to Vout2. |
| 24 | PB_OUT | output | Open-drain output driven by status of PB_IN input after debounce; PB_OUT LOW if PB_IN LOW. |
| 25 | PB_IN | input | Enable input for TPS6507x; when pulled LOW the DCDC converters and LDOs start with programmed sequencing; internal 50kΩ pullup to AVDD6. |
| 26 | PGOOD | output | Open-drain power good output; delay time equals Reset setting; goes LOW per PGOODMASK register or for 0.5 ms when PB_IN pulled LOW for >15s. |
| 27 | SDAT | bidirectional | Data line for the I2C interface. |
| 28 | SCLK | input | Clock input for the I2C interface. |
| 29 | VDCDC3 | input | Feedback voltage sense input; connect directly to Vout3. |
| 30 | PGND3 | power_in | Power GND for DCDC3; connect to PGND (thermal pad). |
| 31 | L3 | output | Switch pin of DCDC3; connect to inductor. |
| 32 | VIN_DCDC3 | power_in | Input voltage for DCDC3 step-down converter; must be connected to SYS pin. |
| 33 | ISINK2 | input | Input to the current sink 2; connect the cathode of the LEDs to this pin. |
| 34 | ISINK1 | input | Input to the current sink 1; connect the cathode of the LEDs to this pin. |
| 35 | ISET1 (AD_IN6) | input | Connect a resistor from this pin to GND to set the full scale current for Isink1 and Isink2 with Bit Current Level in register WLED_CTRL0 set to 1; also analog input6 for A/D converter. |
| 36 | ISET2 (AD_IN7) | input | Connect a resistor from this pin to GND to set the full scale current for Isink1 and Isink2 with Bit Current Level in register WLED_CTRL0 set to 0; also analog input7 for A/D converter. |
| 37 | L4 | output | Switch pin of the white LED (wLED) boost converter; connect to inductor and rectifier diode. |
| 38 | FB_WLED | input | Feedback input for the boost converter's output voltage. |
| 39 | RESET | output | Open-drain active low reset output; reset delay time equals settings in register PGOOD; status depends on voltage applied at THRESHOLD pin. |
| 40 | INT | output | Open-drain interrupt output; can be generated upon touch of touch screen, voltage applied or removed at AC or USB pins, or PB_IN actively pulled low. |
| 41 | BYPASS | power_out | Connect a 10-µF bypass capacitor to GND; can optionally be used as 2.26 V reference output with maximum 0.1 mA load. |
| 42 | AGND | power_in | Analog GND; connect to PGND (thermal pad). |
| 43 | AD_IN1 (TSX1) | input | Analog input1 for A/D converter; input 1 to the x-plate for the touch screen. |
| 44 | AD_IN2 (TSX2) | input | Analog input2 for A/D converter; input 2 to the x-plate for the touch screen. |
| 45 | AD_IN3 (TSY1) | input | Analog input3 for A/D converter; input 1 to the y-plate for the touch screen. |
| 46 | AD_IN4 (TSY2) | input | Analog input4 for A/D converter; input 2 to the y-plate for the touch screen. |
| 47 | THRESHOLD | input | Input for the reset comparator; RESET will be LOW if this voltage drops below 1 V. |
| 48 | INT_LDO | power_out | Connect a 2.2-µF bypass capacitor to GND; pin is connected to internal LDO providing power for touch screen controller (TSREF). |
| 49 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-48-EP(6x6) |
| Category | Power Supply Chip |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
TPS65070RSLR - Footprint:
Package_DFN_QFN:QFN-48-1EP_6x6mm_P0.4mm_EP4.2x4.2mm - 3D model: VQFN-48-EP(6x6), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
tps65070rslr-etched.step/tps65070rslr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps65070rslr.step/tps65070rslr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (100 pp, sha256
a79405797feebece, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS65070RSLR
**Texas Instruments** · Battery Management ICs · VQFN-48-EP(6x6)
TPS65070RSLR from Texas Instruments, in a VQFN-48-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AVDD6 | power_out | Internal always-on voltage; connect a 4.7-µF capacitor from this pin to GND. |
| 2 | VLDO2 | power_out | Output voltage of LDO2. |
| 3 | VINLDO1/2 | power_in | Input voltage for LDO1 and LDO2. |
| 4 | VLDO1 | power_out | Output voltage of LDO1. |
| 5 | BAT | power_out | Charger power stage output; connect to battery with 10 µF ceramic capacitor to GND. |
| 6 | BAT | power_out | Charger power stage output; connect to battery with 10 µF ceramic capacitor to GND. |
| 7 | SYS | power_out | System voltage output of the power path manager; all voltage regulators are typically powered from this output. |
| 8 | SYS | power_out | System voltage output of the power path manager; all voltage regulators are typically powered from this output. |
| 9 | ISET | input | Connect a resistor from ISET to GND to set the charge current. |
| 10 | AC | power_in | Input power for power path manager; connect to external DC supply with 1 µF minimum capacitor to GND. |
| 11 | TS | input | Temperature sense input; connect to NTC thermistor to sense battery pack temperature. |
| 12 | USB | power_in | Input power for power path manager from USB port; connect 1 µF minimum capacitor to GND with 500 mA maximum default input current limit. |
| 13 | POWER_ON | input | Power_ON input for internal state machine; must be pulled HIGH by application processor to keep system ON when PB_IN is released. |
| 14 | EN_DCDC1 | input | Enable input for DCDC1, active high. |
| 15 | EN_DCDC2 | input | Enable input for DCDC2, active high. |
| 16 | EN_DCDC3 | input | Enable input for DCDC3, active high. |
| 17 | DEFDCDC3 | input | Select pin of DCDC3 output voltage. |
| 18 | DEFDCDC2 | input | Select pin of DCDC2 output voltage. |
| 19 | VDCDC1 | input | Feedback voltage sense input; for fixed voltage option connect directly to Vout1, for adjustable version connect to external resistor divider. |
| 20 | L1 | output | Switch pin for DCDC1; connect to inductor. |
| 21 | VINDCDC1/2 | power_in | Input voltage for DCDC1 and DCDC2 step-down converter; must be connected to SYS pin. |
| 22 | L2 | output | Switch pin of DCDC2; connect to inductor. |
| 23 | VDCDC2 | input | Feedback voltage sense input; connect directly to Vout2. |
| 24 | PB_OUT | output | Open-drain output driven by status of PB_IN input after debounce; PB_OUT LOW if PB_IN LOW. |
| 25 | PB_IN | input | Enable input for TPS6507x; when pulled LOW the DCDC converters and LDOs start with programmed sequencing; internal 50kΩ pullup to AVDD6. |
| 26 | PGOOD | output | Open-drain power good output; delay time equals Reset setting; goes LOW per PGOODMASK register or for 0.5 ms when PB_IN pulled LOW for >15s. |
| 27 | SDAT | bidirectional | Data line for the I2C interface. |
| 28 | SCLK | input | Clock input for the I2C interface. |
| 29 | VDCDC3 | input | Feedback voltage sense input; connect directly to Vout3. |
| 30 | PGND3 | power_in | Power GND for DCDC3; connect to PGND (thermal pad). |
| 31 | L3 | output | Switch pin of DCDC3; connect to inductor. |
| 32 | VIN_DCDC3 | power_in | Input voltage for DCDC3 step-down converter; must be connected to SYS pin. |
| 33 | ISINK2 | input | Input to the current sink 2; connect the cathode of the LEDs to this pin. |
| 34 | ISINK1 | input | Input to the current sink 1; connect the cathode of the LEDs to this pin. |
| 35 | ISET1 (AD_IN6) | input | Connect a resistor from this pin to GND to set the full scale current for Isink1 and Isink2 with Bit Current Level in register WLED_CTRL0 set to 1; also analog input6 for A/D converter. |
| 36 | ISET2 (AD_IN7) | input | Connect a resistor from this pin to GND to set the full scale current for Isink1 and Isink2 with Bit Current Level in register WLED_CTRL0 set to 0; also analog input7 for A/D converter. |
| 37 | L4 | output | Switch pin of the white LED (wLED) boost converter; connect to inductor and rectifier diode. |
| 38 | FB_WLED | input | Feedback input for the boost converter's output voltage. |
| 39 | RESET | output | Open-drain active low reset output; reset delay time equals settings in register PGOOD; status depends on voltage applied at THRESHOLD pin. |
| 40 | INT | output | Open-drain interrupt output; can be generated upon touch of touch screen, voltage applied or removed at AC or USB pins, or PB_IN actively pulled low. |
| 41 | BYPASS | power_out | Connect a 10-µF bypass capacitor to GND; can optionally be used as 2.26 V reference output with maximum 0.1 mA load. |
| 42 | AGND | power_in | Analog GND; connect to PGND (thermal pad). |
| 43 | AD_IN1 (TSX1) | input | Analog input1 for A/D converter; input 1 to the x-plate for the touch screen. |
| 44 | AD_IN2 (TSX2) | input | Analog input2 for A/D converter; input 2 to the x-plate for the touch screen. |
| 45 | AD_IN3 (TSY1) | input | Analog input3 for A/D converter; input 1 to the y-plate for the touch screen. |
| 46 | AD_IN4 (TSY2) | input | Analog input4 for A/D converter; input 2 to the y-plate for the touch screen. |
| 47 | THRESHOLD | input | Input for the reset comparator; RESET will be LOW if this voltage drops below 1 V. |
| 48 | INT_LDO | power_out | Connect a 2.2-µF bypass capacitor to GND; pin is connected to internal LDO providing power for touch screen controller (TSREF). |
| 49 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-48-EP(6x6) |
| Category | Power Supply Chip |
| Pins | 49 |
## CAD (KiCad official)
- Symbol: `TPS65070RSLR`
- Footprint: `Package_DFN_QFN:QFN-48-1EP_6x6mm_P0.4mm_EP4.2x4.2mm`
- 3D model: VQFN-48-EP(6x6), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `tps65070rslr-etched.step` / `tps65070rslr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps65070rslr.step` / `tps65070rslr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps65070) (100 pp, sha256 `a79405797feebece`, retrieved 2026-10-07, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps65070rslr-datasheet.pdf)