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TPS65050RSMR
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Texas Instruments Power Management Specialized - PMIC, VQFN-32-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+69@@ -0,0 +1,69 @@+# TPS65050RSMR++**Texas Instruments** · Power Management Specialized - PMIC · VQFN-32-EP(4x4)++TPS65050RSMR from Texas Instruments, in a VQFN-32-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BP | input | Input for the bypass capacitor of the internal reference. |+| 2 | AGND | power_in | Analog ground; connect to PGND and the thermal pad. |+| 3 | VCC | power_in | Power supply for the digital and analog circuitry of DCDC1, DCDC2 and the LDOs; must be connected to the same voltage supply as VINDCDC1/2. |+| 4 | VINLDO2 | input | Input voltage for LDO2, recommended range 1.5 V to 6.5 V. |+| 5 | VLDO2 | output | Output voltage of LDO2; LDO1/LDO2 output current is rated up to 400 mA and output range 1 V to 3.6 V. |+| 6 | DEFLDO2 | input | Digital input used to set the default output voltage of LDO1 to LDO4. |+| 7 | PB_IN | input | Input for the pushbutton ON-OFF function; pulling it high toggles PB_OUT. |+| 8 | GND | power_in | Ground; connect to GND. |+| 9 | DEFLDO3 | input | Digital input used to set the default output voltage of LDO1 to LDO4. |+| 10 | VLDO3 | output | Output voltage of LDO3; output current is rated up to 200 mA. |+| 11 | VINLDO3/4 | input | Input voltage for LDO3 and LDO4, recommended range 1.5 V to 6.5 V. |+| 12 | VLDO4 | output | Output voltage of LDO4; output current is rated up to 200 mA. |+| 13 | DEFLDO4 | input | Digital input used to set the default output voltage of LDO1 to LDO4; MSB. |+| 14 | PB_OUT | output | Open-drain output, active low after VCC exceeds the undervoltage lockout threshold. |+| 15 | EN_LDO3 | input | Enable input for LDO3; logic high enables the LDO and logic low disables it. |+| 16 | EN_LDO4 | input | Enable input for LDO4; logic high enables the LDO and logic low disables it. |+| 17 | DEFDCDC2 | input | On the TPS65050, feedback pin for converter 2; connect to the center of the external resistor divider. |+| 18 | VDCDC2 | input | Feedback voltage sense input for converter 2; connect directly to the converter 2 output. |+| 19 | PGND2 | power_in | Power ground for converter 2. |+| 20 | L2 | output | Switch pin of converter 2, connected to the inductor. |+| 21 | VINDCDC1/2 | input | Input voltage for the VDCDC1 and VDCDC2 step-down converters, recommended range 2.5 V to 6 V; must be connected to the same supply as VCC. |+| 22 | L1 | output | Switch pin of converter 1, connected to the inductor. |+| 23 | PGND1 | power_in | Power ground for converter 1. |+| 24 | FB_DCDC1 | input | Feedback input to set the converter 1 output voltage between 0.6 V and VI; connect the external resistor divider between VOUT1, this pin and GND. |+| 25 | EN_DCDC1 | input | Enable input for converter 1, active high. |+| 26 | EN_DCDC2 | input | Enable input for converter 2, active high. |+| 27 | EN_LDO1 | input | Enable input for LDO1; logic high enables the LDO and logic low disables it. |+| 28 | EN_LDO2 | input | Enable input for LDO2; logic high enables the LDO and logic low disables it. |+| 29 | VINLDO1 | input | Input voltage for LDO1, recommended range 1.5 V to 6.5 V. |+| 30 | VLDO1 | output | Output voltage of LDO1; output current is rated up to 400 mA. |+| 31 | DEFLDO1 | input | Digital input used to set the default output voltage of LDO1 to LDO4; LSB. |+| 32 | MODE | input | Selects Power Save Mode (low) or forced PWM mode (high) for DCDC1 and DCDC2. |+| 33 | Thermal pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-32-EP(4x4) |+| Category | Power Supply Chip |+| Pins | 33 |++## CAD (KiCad official)++- Symbol: `TPS65050RSMR`+- Footprint: `Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm`+- 3D model: VQFN-32-EP(4x4) (KiCad packages3D, STEP)+- 3D model files: `tps65050rsmr-etched.step` / `tps65050rsmr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps65050rsmr.step` / `tps65050rsmr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps65050) (45 pp, sha256 `2d98e1f35d04a8b6`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps65050rsmr-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power supply chip",+ "tps65050rsmr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps65050rsmr.kicad_sym",+ "tps65050rsmr.kicad_mod",+ "tps65050rsmr.glb",+ "tps65050rsmr.step",+ "tps65050rsmr.lbr",+ "docs/hero.png",+ "docs/tps65050rsmr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps65050rsmr-hero.glb",+ "tps65050rsmr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS65050RSMR",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-32-EP(4x4)",+ "pin_count": 33,+ "category": "Power Supply Chip",+ "subcategory": "Power Management Specialized - PMIC",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps65050",+ "parts": {+ "symbol": "tps65050rsmr.kicad_sym",+ "footprint": "tps65050rsmr.kicad_mod",+ "model_3d": "tps65050rsmr-hero.glb",+ "model_3d_plain": "tps65050rsmr.glb",+ "model_3d_step": "tps65050rsmr-etched.step",+ "model_3d_step_plain": "tps65050rsmr.step",+ "lbr": "tps65050rsmr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2156393",+ "digikey": "296-24615-2-ND",+ "mouser": "595-TPS65050RSMR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T15:36:03Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-24615-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS65050RSMR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "BP",+ "type": "input",+ "description": "Input for the bypass capacitor of the internal reference."+ },+ {+ "number": "2",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground; connect to PGND and the thermal pad."+ },+ {+ "number": "3",+ "name": "VCC",+ "type": "power_in",+ "description": "Power supply for the digital and analog circuitry of DCDC1, DCDC2 and the LDOs; must be connected to the same voltage supply as VINDCDC1/2."+ },+ {+ "number": "4",+ "name": "VINLDO2",+ "type": "input",+ "description": "Input voltage for LDO2, recommended range 1.5 V to 6.5 V."+ },+ {+ "number": "5",+ "name": "VLDO2",+ "type": "output",+ "description": "Output voltage of LDO2; LDO1/LDO2 output current is rated up to 400 mA and output range 1 V to 3.6 V."+ },+ {+ "number": "6",+ "name": "DEFLDO2",+ "type": "input",+ "description": "Digital input used to set the default output voltage of LDO1 to LDO4."+ },+ {+ "number": "7",+ "name": "PB_IN",+ "type": "input",+ "description": "Input for the pushbutton ON-OFF function; pulling it high toggles PB_OUT."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground; connect to GND."+ },+ {+ "number": "9",+ "name": "DEFLDO3",+ "type": "input",+ "description": "Digital input used to set the default output voltage of LDO1 to LDO4."+ },+ {+ "number": "10",+ "name": "VLDO3",+ "type": "output",+ "description": "Output voltage of LDO3; output current is rated up to 200 mA."+ },+ {+ "number": "11",+ "name": "VINLDO3/4",+ "type": "input",+ "description": "Input voltage for LDO3 and LDO4, recommended range 1.5 V to 6.5 V."+ },+ {+ "number": "12",+ "name": "VLDO4",+ "type": "output",+ "description": "Output voltage of LDO4; output current is rated up to 200 mA."+ },+ {+ "number": "13",+ "name": "DEFLDO4",+ "type": "input",+ "description": "Digital input used to set the default output voltage of LDO1 to LDO4; MSB."+ },+ {+ "number": "14",+ "name": "PB_OUT",+ "type": "output",+ "description": "Open-drain output, active low after VCC exceeds the undervoltage lockout threshold."+ },+ {+ "number": "15",+ "name": "EN_LDO3",+ "type": "input",+ "description": "Enable input for LDO3; logic high enables the LDO and logic low disables it."+ },+ {+ "number": "16",+ "name": "EN_LDO4",+ "type": "input",+ "description": "Enable input for LDO4; logic high enables the LDO and logic low disables it."+ },+ {+ "number": "17",+ "name": "DEFDCDC2",+ "type": "input",+ "description": "On the TPS65050, feedback pin for converter 2; connect to the center of the external resistor divider."+ },+ {+ "number": "18",+ "name": "VDCDC2",+ "type": "input",+ "description": "Feedback voltage sense input for converter 2; connect directly to the converter 2 output."+ },+ {+ "number": "19",+ "name": "PGND2",+ "type": "power_in",+ "description": "Power ground for converter 2."+ },+ {+ "number": "20",+ "name": "L2",+ "type": "output",+ "description": "Switch pin of converter 2, connected to the inductor."+ },+ {+ "number": "21",+ "name": "VINDCDC1/2",+ "type": "input",+ "description": "Input voltage for the VDCDC1 and VDCDC2 step-down converters, recommended range 2.5 V to 6 V; must be connected to the same supply as VCC."+ },+ {+ "number": "22",+ "name": "L1",+ "type": "output",+ "description": "Switch pin of converter 1, connected to the inductor."+ },+ {+ "number": "23",+ "name": "PGND1",+ "type": "power_in",+ "description": "Power ground for converter 1."+ },+ {+ "number": "24",+ "name": "FB_DCDC1",+ "type": "input",+ "description": "Feedback input to set the converter 1 output voltage between 0.6 V and VI; connect the external resistor divider between VOUT1, this pin and GND."+ },+ {+ "number": "25",+ "name": "EN_DCDC1",+ "type": "input",+ "description": "Enable input for converter 1, active high."+ },+ {+ "number": "26",+ "name": "EN_DCDC2",+ "type": "input",+ "description": "Enable input for converter 2, active high."+ },+ {+ "number": "27",+ "name": "EN_LDO1",+ "type": "input",+ "description": "Enable input for LDO1; logic high enables the LDO and logic low disables it."+ },+ {+ "number": "28",+ "name": "EN_LDO2",+ "type": "input",+ "description": "Enable input for LDO2; logic high enables the LDO and logic low disables it."+ },+ {+ "number": "29",+ "name": "VINLDO1",+ "type": "input",+ "description": "Input voltage for LDO1, recommended range 1.5 V to 6.5 V."+ },+ {+ "number": "30",+ "name": "VLDO1",+ "type": "output",+ "description": "Output voltage of LDO1; output current is rated up to 400 mA."+ },+ {+ "number": "31",+ "name": "DEFLDO1",+ "type": "input",+ "description": "Digital input used to set the default output voltage of LDO1 to LDO4; LSB."+ },+ {+ "number": "32",+ "name": "MODE",+ "type": "input",+ "description": "Selects Power Save Mode (low) or forced PWM mode (high) for DCDC1 and DCDC2."+ },+ {+ "number": "33",+ "name": "Thermal pad",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The exposed thermal pad is part of the 32-pin VQFN but has no printed pin number. The datasheet says; Pin 17 DEFDCDC2 is a feedback pin on the TPS65050 but a voltage select pin on the TPS65052/TPS65056.; Pin 14 PB_OUT is an open-drain output, and the datasheet lists it as 'O'. Mapped to KiCad 'output', ",+ "exposed pad 33 added from the footprint"+ ],+ "pages_sent": 10,+ "cost_usd": 0.095,+ "at": "2026-10-08T15:35:48"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps65050",+ "pages": 45,+ "sha256": "2d98e1f35d04a8b6",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 33,+ "described": 33,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps65050rsmr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4,+ 4,+ 0.6+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "7b482a511cdf2cf875c31931f9fea7f745b8dac2ea6203531cd6604f40a290cb",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps65050rsmr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4,+ 4,+ 0.6+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "fb394a7b7850bb746beefcde2ed35e1902ee2f9daf2eb8bfe372de9338051619",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}