component
TPS650002TRTERQ1
Public Made by Adomby adom
Texas Instruments Power Management - Specialized, WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+54@@ -0,0 +1,54 @@+# TPS650002TRTERQ1++**Texas Instruments** · Power Management - Specialized · WQFN-16-EP(3x3)++TPS650002TRTERQ1 from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | EN_LDO1 | input | Enable input for LDO1; logic levels are VIH of 1.2 V minimum and VIL of 0.4 V maximum, with enable voltages from 0 V to VINDCDC. |+| 2 | EN_LDO2 | input | Enable input for LDO2; logic levels are VIH of 1.2 V minimum and VIL of 0.4 V maximum, with enable voltages from 0 V to VINDCDC. |+| 3 | PG | output | Open-drain active-low power-good output that is pulled low when all enabled outputs are above 95% of target and goes Hi-Z when an enabled output is below 90%. |+| 4 | PGND | power_in | Power ground, connected to the thermal pad; AGND should star back to PGND as close to the IC as possible. |+| 5 | SW | output | Step-down converter switch pin where the inductor (1.5 µH to 3.3 µH, 2.2 µH typical) connects; absolute maximum is -0.6 V to 7 V, or -2 V to 10 V for 20 ns transients. |+| 6 | VINDCDC | power_in | Input voltage to the DC-DC converter and all other control blocks, specified from 2.3 V to 6 V. |+| 7 | MODE | input | Selects forced-PWM operation when pulled high or automatic PFM/PWM transition when pulled low, with the input range 0 V to VINDCDC. |+| 8 | EN_DCDC | input | Enable input for the DC-DC converter, with enable voltages from 0 V to VINDCDC and the same logic levels as the other enables. |+| 9 | FB_DCDC | input | Voltage feedback input to the DC-DC error amplifier, which must externally connect to the output capacitor. |+| 10 | AGND | power_in | Analog ground, which should star back to PGND as close to the IC as possible. |+| 11 | FB_LDO1 | input | Voltage feedback input to the LDO1 error amplifier, which must externally connect to the output capacitor; absolute maximum is -0.3 V to 3.6 V. |+| 12 | VLDO1 | power_out | LDO1 fixed 2.8 V output, rated for up to 300 mA; absolute maximum is -0.3 V to 3.6 V. |+| 13 | VINLDO1 | power_in | Input voltage to LDO1, specified from 1.6 V to VINDCDC. |+| 14 | FB_LDO2 | input | Voltage feedback input to the LDO2 error amplifier, which must externally connect to the output capacitor; absolute maximum is -0.3 V to 3.6 V. |+| 15 | VLDO2 | power_out | LDO2 fixed 1.2 V output, rated for up to 300 mA; absolute maximum is -0.3 V to 3.6 V. |+| 16 | VINLDO2 | power_in | Input voltage to LDO2, specified from 1.6 V to VINDCDC. |+| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WQFN-16-EP(3x3) |+| Category | Power Management (PMIC) |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `TPS650002TRTERQ1`+- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`+- 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)+- 3D model files: `tps650002trterq1-etched.step` / `tps650002trterq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps650002trterq1.step` / `tps650002trterq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps650002-q1) (25 pp, sha256 `d420eff11d30a216`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps650002trterq1-datasheet.pdf)
page.jsonadded+256@@ -0,0 +1,256 @@+{+ "slug": "tps650002trterq1",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Power Management - Specialized, WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps650002trterq1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps650002trterq1.kicad_sym",+ "tps650002trterq1.kicad_mod",+ "tps650002trterq1.glb",+ "tps650002trterq1.step",+ "tps650002trterq1.lbr",+ "docs/hero.png",+ "docs/tps650002trterq1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps650002trterq1-hero.glb",+ "tps650002trterq1-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS650002TRTERQ1",+ "manufacturer": "Texas Instruments",+ "package": "WQFN-16-EP(3x3)",+ "pin_count": 17,+ "category": "Power Management (PMIC)",+ "subcategory": "Power Management - Specialized",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps650002-q1",+ "parts": {+ "symbol": "tps650002trterq1.kicad_sym",+ "footprint": "tps650002trterq1.kicad_mod",+ "model_3d": "tps650002trterq1-hero.glb",+ "model_3d_plain": "tps650002trterq1.glb",+ "model_3d_step": "tps650002trterq1-etched.step",+ "model_3d_step_plain": "tps650002trterq1.step",+ "lbr": "tps650002trterq1.lbr"+ },+ "distributor_links": {+ "lcsc": "C2156049",+ "digikey": "296-TPS650002TRTERQ1TR-ND",+ "mouser": "595-TPS650002TRTERQ1"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T15:36:49Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-TPS650002TRTERQ1TR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS650002TRTERQ1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "EN_LDO1",+ "type": "input",+ "description": "Enable input for LDO1; logic levels are VIH of 1.2 V minimum and VIL of 0.4 V maximum, with enable voltages from 0 V to VINDCDC."+ },+ {+ "number": "2",+ "name": "EN_LDO2",+ "type": "input",+ "description": "Enable input for LDO2; logic levels are VIH of 1.2 V minimum and VIL of 0.4 V maximum, with enable voltages from 0 V to VINDCDC."+ },+ {+ "number": "3",+ "name": "PG",+ "type": "output",+ "description": "Open-drain active-low power-good output that is pulled low when all enabled outputs are above 95% of target and goes Hi-Z when an enabled output is below 90%."+ },+ {+ "number": "4",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground, connected to the thermal pad; AGND should star back to PGND as close to the IC as possible."+ },+ {+ "number": "5",+ "name": "SW",+ "type": "output",+ "description": "Step-down converter switch pin where the inductor (1.5 µH to 3.3 µH, 2.2 µH typical) connects; absolute maximum is -0.6 V to 7 V, or -2 V to 10 V for 20 ns transients."+ },+ {+ "number": "6",+ "name": "VINDCDC",+ "type": "power_in",+ "description": "Input voltage to the DC-DC converter and all other control blocks, specified from 2.3 V to 6 V."+ },+ {+ "number": "7",+ "name": "MODE",+ "type": "input",+ "description": "Selects forced-PWM operation when pulled high or automatic PFM/PWM transition when pulled low, with the input range 0 V to VINDCDC."+ },+ {+ "number": "8",+ "name": "EN_DCDC",+ "type": "input",+ "description": "Enable input for the DC-DC converter, with enable voltages from 0 V to VINDCDC and the same logic levels as the other enables."+ },+ {+ "number": "9",+ "name": "FB_DCDC",+ "type": "input",+ "description": "Voltage feedback input to the DC-DC error amplifier, which must externally connect to the output capacitor."+ },+ {+ "number": "10",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground, which should star back to PGND as close to the IC as possible."+ },+ {+ "number": "11",+ "name": "FB_LDO1",+ "type": "input",+ "description": "Voltage feedback input to the LDO1 error amplifier, which must externally connect to the output capacitor; absolute maximum is -0.3 V to 3.6 V."+ },+ {+ "number": "12",+ "name": "VLDO1",+ "type": "power_out",+ "description": "LDO1 fixed 2.8 V output, rated for up to 300 mA; absolute maximum is -0.3 V to 3.6 V."+ },+ {+ "number": "13",+ "name": "VINLDO1",+ "type": "power_in",+ "description": "Input voltage to LDO1, specified from 1.6 V to VINDCDC."+ },+ {+ "number": "14",+ "name": "FB_LDO2",+ "type": "input",+ "description": "Voltage feedback input to the LDO2 error amplifier, which must externally connect to the output capacitor; absolute maximum is -0.3 V to 3.6 V."+ },+ {+ "number": "15",+ "name": "VLDO2",+ "type": "power_out",+ "description": "LDO2 fixed 1.2 V output, rated for up to 300 mA; absolute maximum is -0.3 V to 3.6 V."+ },+ {+ "number": "16",+ "name": "VINLDO2",+ "type": "power_in",+ "description": "Input voltage to LDO2, specified from 1.6 V to VINDCDC."+ },+ {+ "number": "17",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Datasheet pin table prints only I, O, or dash for pin types. Supply inputs (VIN*) and PGND/AGND are ; The exposed thermal pad is listed as EP in the datasheet pin table, not as a numbered pin. It is inc",+ "exposed pad 17 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 25,+ "cost_usd": 0.1134,+ "at": "2026-10-08T15:36:34"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps650002-q1",+ "pages": 25,+ "sha256": "d420eff11d30a216",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps650002trterq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 3,+ 3,+ 0.785+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "3eb81ffac423a66cdcfead8efe56401da171edaf1f2257049aad7b2d3900f6c8",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps650002trterq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 3,+ 3,+ 0.785+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "77dd8b959540ef8ca05070f716705424edda0dc27fd04a3c3e23beb2ec261ee4",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}