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Ray tps62a02drlr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 9dc389c 1d ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "tps62a02drlr",
  "title": "TPS62A02DRLR",
  "brief": "Texas Instruments DC-DC Converters, SOT-563. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "power management (pmic)",
    "tps62a02drlr"
  ],
  "component": {
    "mpn": "TPS62A02DRLR",
    "manufacturer": "Texas Instruments",
    "package": "SOT-563",
    "pin_count": 6,
    "category": "Power Management (PMIC)",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://www.ti.com/lit/ds/symlink/tps62a02.pdf",
    "parts": {
      "symbol": "tps62a02drlr.kicad_sym",
      "footprint": "tps62a02drlr.kicad_mod",
      "model_3d": "tps62a02drlr-etched.glb",
      "model_3d_plain": "tps62a02drlr.glb",
      "model_3d_step": "tps62a02drlr-etched.step",
      "model_3d_step_plain": "tps62a02drlr.step",
      "lbr": "tps62a02drlr.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin. Common return for the input capacitor, output capacitor, and internal control circuitry."
      },
      {
        "number": "2",
        "name": "SW",
        "type": "output",
        "description": "Switch node connected to the internal high-side and low-side FETs and the inductor terminal. Connect the output filter inductor (typ. 1.0 µH) between SW and VOUT. Absolute max -0.3 V to VIN+0.3 V DC; -3 V to 10 V transient <10 ns."
      },
      {
        "number": "3",
        "name": "VIN",
        "type": "power_in",
        "description": "Input supply voltage pin, 2.5 V to 5.5 V. Place the input capacitor as close as possible between VIN and GND. Absolute max 6.5 V."
      },
      {
        "number": "4",
        "name": "EN",
        "type": "input",
        "description": "Device enable logic input. Logic high (>1.2 V rising) enables the converter; logic low (<0.4 V falling) forces shutdown (≤2 µA IQ). Do not leave floating. Absolute max 6.5 V."
      },
      {
        "number": "5",
        "name": "FB",
        "type": "input",
        "description": "Feedback pin for the internal control loop. Connect this pin to the center tap of an external resistor divider from VOUT to set the output voltage. Internal reference VFB = 600 mV (±1% at 0-125°C)."
      },
      {
        "number": "6",
        "name": "PG",
        "type": "output",
        "description": "Power-good open-drain output pin. Requires an external pullup resistor tied to a rail no higher than 5.5 V (do NOT tie to a rail higher than 5.5 V even if VIN is higher). Asserts high when FB is within ~96% of nominal; leave open or tie to GND if unused."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/tps62a02.pdf",
        "pages": 31,
        "sha256": "cad0b23ab8636891",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 6,
        "described": 6,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tps62a02drlr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          1.6,
          1.6,
          0.63
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "76c34aa4905777c0a8abe4718019904a3a9f8343cab7cc056f4516b7ef5165fc",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tps62a02drlr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          1.6,
          1.6,
          0.63
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "0d855ce41202672b685ad89738063ad5bb10dbfb16637f33cc680529c5c63bd3",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "SOT-563",
      "Category": "Power Management (PMIC)",
      "Pins": "6"
    }
  },
  "variants": [
    {
      "mpn": "TPS62A02DRLR",
      "kind": "packaging"
    },
    {
      "mpn": "TPS62A02DRLRADRLR",
      "kind": "packaging"
    },
    {
      "mpn": "TPS62A02DRLRNDRLR",
      "kind": "packaging"
    },
    {
      "mpn": "TPS62A02DRLRNADRLR",
      "kind": "packaging"
    },
    {
      "mpn": "TPS62A02DRLRDDCR",
      "kind": "packaging"
    },
    {
      "mpn": "TPS62A02DRLRAPDDCR",
      "kind": "packaging"
    },
    {
      "mpn": "TPS62A02DRLRPDDCR",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "tps62a02drlr"
  ],
  "discovery_pitch": "TPS62A02DRLR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tps62a02drlr.kicad_sym",
    "tps62a02drlr.kicad_mod",
    "tps62a02drlr.glb",
    "tps62a02drlr.step",
    "tps62a02drlr.lbr",
    "docs/hero.png",
    "docs/tps62a02drlr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-25T12:27:28.936Z"
}